Datasheet Texas Instruments DS90CR286AT-Q1 — Datenblatt

Product
Folder Sample &
Buy Support &
Community Tools &
Software Technical
Documents DS90CR286AT-Q1
SNLS498A – NOVEMBER 2015 – REVISED DECEMBER 2015 DS90CR286AT-Q1 3.3 V Rising Edge Data Strobe
LVDS Receiver 28-Bit Channel Link 66 MHz
1 Features 3 Description The DS90CR286AT-Q1 receiver converts four LVDS
(Low Voltage Differential Signaling) data streams
back into parallel 28 bits of LVCMOS data. The
receiver data outputs strobe on the output clock's
rising edge. 1 20 to 66 MHz Shift Clock Support
50% Duty Cycle on Receiver Output Clock
Best–in–Class Setup & Hold Times on Rx Outputs
Rx Power Consumption < 270 mW (typ) at 66
MHz Worst Case
Rx Power-down Mode < 200 ОјW (max)
ESD Rating: 4 kV (HBM), 1 kV (CDM)
PLL Requires No External Components
Compatible with TIA/EIA-644 LVDS Standard
Low Profile 56-Pin DGG (TSSOP) Package
Operating Temperature: -40В°C to +105В°C …