Datasheet Texas Instruments DS90CR285MTDX/NOPB — Datenblatt
Hersteller | Texas Instruments |
Serie | DS90CR285 |
Artikelnummer | DS90CR285MTDX/NOPB |
+ 3,3 V Daten-Strobe-LVDS-28-Bit-Kanal mit steigender Flanke - 66 MHz 56-TSSOP -40 bis 85
Datenblätter
DS90CR285/DS90CR286 3.3V Rising Edge Data Strobe LVDS 28Bit Channel Link- 66MHz datasheet
PDF, 1.5 Mb, Revision: C, Datei veröffentlicht: Mar 5, 2013
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Preise
Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Verpackung
Pin | 56 | 56 |
Package Type | DGG | DGG |
Industry STD Term | TSSOP | TSSOP |
JEDEC Code | R-PDSO-G | R-PDSO-G |
Package QTY | 1000 | 1000 |
Carrier | LARGE T&R | LARGE T&R |
Device Marking | >B | DS90CR285MTD |
Width (mm) | 6.1 | 6.1 |
Length (mm) | 14 | 14 |
Thickness (mm) | 1.15 | 1.15 |
Pitch (mm) | .5 | .5 |
Max Height (mm) | 1.2 | 1.2 |
Mechanical Data | Herunterladen | Herunterladen |
Parameter
Clock Max | 66 MHz |
Clock Min | 20 MHz |
Compression Ratio | 28 to 4 |
Data Throughput | 1848 Mbps |
ESD | 7 kV |
Function | Serializer |
Input Compatibility | LVCMOS |
Operating Temperature Range | -40 to 85 C |
Output Compatibility | LVDS |
Package Group | TSSOP |
Package Size: mm2:W x L | 56TSSOP: 113 mm2: 8.1 x 14(TSSOP) PKG |
Parallel Bus Width | 28 bits |
Protocols | Channel-Link I |
Rating | Catalog |
Supply Voltage(s) | 3.3 V |
Öko-Plan
RoHS | Compliant |
Design Kits und Evaluierungsmodule
- Evaluation Modules & Boards: FLINK3V8BT-85
Evaluation Kit for FPD-Link Family of Serializer and Deserializer LVDS Devices
Lifecycle Status: Active (Recommended for new designs)
Anwendungshinweise
- Improving the Robustness of Channel Link Designs with Channel Link II Ser/Des (Rev. A)PDF, 62 Kb, Revision: A, Datei veröffentlicht: Apr 26, 2013
This application note discusses how system designers are able to use Channel Link II ser/Des to improve old and new channel link designs. - CHANNEL LINK Moving and Shaping Information In Point-To-Point ApplicationsPDF, 269 Kb, Datei veröffentlicht: Oct 5, 1998
- Multi-Drop Channel-Link OperationPDF, 212 Kb, Datei veröffentlicht: Oct 4, 2004
- Receiver Skew Margin for Channel Link I and FPD Link I DevicesPDF, 418 Kb, Datei veröffentlicht: Jan 13, 2016
- AN-1108 Channel-Link PCB and Interconnect Design-In GuidelinesPDF, 245 Kb, Datei veröffentlicht: May 15, 2004
Application Note 1108 Channel-Link PCB and Interconnect Design-In Guidelines
Modellreihe
Serie: DS90CR285 (4)
- DS90CR285MTD DS90CR285MTD/NOPB DS90CR285MTDX DS90CR285MTDX/NOPB
Herstellerklassifikation
- Semiconductors > Interface > LVDS/M-LVDS/PECL > SerDes/Channel-Link