Datasheet Texas Instruments DS90CF386 — Datenblatt

HerstellerTexas Instruments
SerieDS90CF386
Datasheet Texas Instruments DS90CF386

+ 3,3-V-LVDS-Empfänger, 24-Bit-FPD-Verbindung (Flat Panel Display) - 85 MHz

Datenblätter

DS90CF3x6 3.3-V LVDS Receiver 24-Bit Or 18-Bit Flat Panel Display (FPD) Link, 85 MHz datasheet
PDF, 2.2 Mb, Revision: J, Datei veröffentlicht: May 31, 2016
Auszug aus dem Dokument

Preise

Status

DS90CF386MTDDS90CF386MTD/NOPBDS90CF386MTDX/NOPBDS90CF386SLC/NOPBDS90CF386SLCX/NOPB
Lifecycle StatusNRND (Not recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoYesYesNo

Verpackung

DS90CF386MTDDS90CF386MTD/NOPBDS90CF386MTDX/NOPBDS90CF386SLC/NOPBDS90CF386SLCX/NOPB
N12345
Pin5656566464
Package TypeDGGDGGDGGNZCNZC
Industry STD TermTSSOPTSSOPTSSOPNFBGANFBGA
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GS-PBGA-NS-PBGA-N
Package QTY343410003602000
CarrierTUBETUBELARGE T&RJEDEC TRAY (10+1)LARGE T&R
Device MarkingDS90CF386MTD>B>BSLCDS90CF386
Width (mm)6.16.16.188
Length (mm)14141488
Thickness (mm)1.151.151.151.41.4
Pitch (mm).5.5.5.8.8
Max Height (mm)1.21.21.21.51.5
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsDS90CF386MTD
DS90CF386MTD
DS90CF386MTD/NOPB
DS90CF386MTD/NOPB
DS90CF386MTDX/NOPB
DS90CF386MTDX/NOPB
DS90CF386SLC/NOPB
DS90CF386SLC/NOPB
DS90CF386SLCX/NOPB
DS90CF386SLCX/NOPB
Color Depth, bpp2424242424
FunctionReceiverReceiverReceiverReceiverReceiver
Input CompatibilityFPD-Link LVDSFPD-Link LVDSFPD-Link LVDSFPD-Link LVDSFPD-Link LVDS
Operating Temperature Range, C-10 to 70-10 to 70-10 to 70-10 to 70-10 to 70
Output CompatibilityLVCMOSLVCMOSLVCMOSLVCMOSLVCMOS
Package GroupTSSOPTSSOPTSSOPNFBGANFBGA
Package Size: mm2:W x L, PKG56TSSOP: 113 mm2: 8.1 x 14(TSSOP)56TSSOP: 113 mm2: 8.1 x 14(TSSOP)56TSSOP: 113 mm2: 8.1 x 14(TSSOP)64NFBGA: 64 mm2: 8 x 8(NFBGA)64NFBGA: 64 mm2: 8 x 8(NFBGA)
Pixel Clock Min, MHz2020202020
Pixel Clock(Max), MHz8585858585
RatingCatalogCatalogCatalogCatalogCatalog
Total Throughput, Mbps23802380238023802380

Öko-Plan

DS90CF386MTDDS90CF386MTD/NOPBDS90CF386MTDX/NOPBDS90CF386SLC/NOPBDS90CF386SLCX/NOPB
RoHSSee ti.comCompliantCompliantCompliantCompliant

Anwendungshinweise

  • AN-1056 STN Application Using FPD-Link
    PDF, 85 Kb, Datei veröffentlicht: May 14, 2004
    Application Note 1056 STN Application Using FPD-Link
  • TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map
    PDF, 52 Kb, Datei veröffentlicht: May 15, 2004
    Application Note 1163 TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map
  • LVDS Display Interface (LDI) TFT Data Mapping for Interoperability w/FPD-Link
    PDF, 65 Kb, Datei veröffentlicht: May 14, 2004
    Application Note 1127 LVDS Display Interface (LDI) TFT Data Mapping for Interoperabil ity with FPD-Link
  • AN-1085 FPD-Link PCB and Interconnect Design-In Guidelines
    PDF, 344 Kb, Datei veröffentlicht: May 14, 2004
    Application Note 1085 FPD-Link PCB and Interconnect Design-In Guidelines
  • AN-1032 An Introduction to FPD-Link (Rev. C)
    PDF, 185 Kb, Revision: C, Datei veröffentlicht: Aug 8, 2017
    The FPD-Linkchipsetarchitecturein conjunctionwith the LVDStechnologyprovidesthe highbandwidthinterfacenecessaryfor leadingedgedisplaytechnology.The conversionfromparallelTTL to serialLVDSallowsfor a narrowinterfacebetweengraphicscontrollerand panel.A narrowerinterfacemeanslowercablecost and simplifiesthe physicalconnectionthroug
  • Receiver Skew Margin for Channel Link I and FPD Link I Devices
    PDF, 418 Kb, Datei veröffentlicht: Jan 13, 2016

Modellreihe

Herstellerklassifikation

  • Semiconductors> Interface> Display & Imaging SerDes> FlatLink/FPD-Link (LVDS for LCD)