Datasheet Texas Instruments DS90C383BMTX/NOPB — Datenblatt
| Hersteller | Texas Instruments |
| Serie | DS90C383B |
| Artikelnummer | DS90C383BMTX/NOPB |
+ 3,3 V programmierbarer LVDS-Sender 24-Bit-Flachbildschirm (FPD) Link-65 MHz 56-TSSOP -10 bis 70
Datenblätter
DS90C383B 3.3V Prog LVDS Trans 24-Bit FPD Link-65 MHz datasheet
PDF, 1.3 Mb, Revision: G, Datei veröffentlicht: Apr 17, 2013
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Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 56 |
| Package Type | DGG |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 1000 |
| Carrier | LARGE T&R |
| Device Marking | DS90C383BMT |
| Width (mm) | 6.1 |
| Length (mm) | 14 |
| Thickness (mm) | 1.15 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Herunterladen |
Parameter
| Color Depth | 24 bpp |
| Function | Transmitter |
| Input Compatibility | LVCMOS,LVTTL |
| Operating Temperature Range | -10 to 70 C |
| Output Compatibility | FPD-Link LVDS |
| Package Group | TSSOP |
| Package Size: mm2:W x L | 56TSSOP: 113 mm2: 8.1 x 14(TSSOP) PKG |
| Pixel Clock Min | 18 MHz |
| Pixel Clock(Max) | 68 MHz |
| Rating | Catalog |
| Total Throughput | 1800 Mbps |
Öko-Plan
| RoHS | Compliant |
Anwendungshinweise
- AN-1056 STN Application Using FPD-LinkPDF, 85 Kb, Datei veröffentlicht: May 14, 2004
Application Note 1056 STN Application Using FPD-Link - TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color MapPDF, 52 Kb, Datei veröffentlicht: May 15, 2004
Application Note 1163 TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map - LVDS Display Interface (LDI) TFT Data Mapping for Interoperability w/FPD-LinkPDF, 65 Kb, Datei veröffentlicht: May 14, 2004
Application Note 1127 LVDS Display Interface (LDI) TFT Data Mapping for Interoperabil ity with FPD-Link - AN-1085 FPD-Link PCB and Interconnect Design-In GuidelinesPDF, 344 Kb, Datei veröffentlicht: May 14, 2004
Application Note 1085 FPD-Link PCB and Interconnect Design-In Guidelines - Receiver Skew Margin for Channel Link I and FPD Link I DevicesPDF, 418 Kb, Datei veröffentlicht: Jan 13, 2016
- AN-1032 An Introduction to FPD-Link (Rev. C)PDF, 185 Kb, Revision: C, Datei veröffentlicht: Aug 8, 2017
The FPD-Linkchipsetarchitecturein conjunctionwith the LVDStechnologyprovidesthe highbandwidthinterfacenecessaryfor leadingedgedisplaytechnology.The conversionfromparallelTTL to serialLVDSallowsfor a narrowinterfacebetweengraphicscontrollerand panel.A narrowerinterfacemeanslowercablecost and simplifiesthe physicalconnectionthroug
Modellreihe
Serie: DS90C383B (3)
- DS90C383BMT/NOPB DS90C383BMTX/NOPB DS90CF383BMT/NOPB
Herstellerklassifikation
- Semiconductors > Interface > FPD-Link SerDes > Display SerDes