Datasheet Texas Instruments DS90C241-Q1 — Datenblatt
Hersteller | Texas Instruments |
Serie | DS90C241-Q1 |
DC-symmetrischer 24-Bit-FPD-Link II-Serializer mit 5 bis 35 MHz
Datenblätter
DS90C241 and DS90C124 5-MHz to 35-MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer datasheet
PDF, 2.1 Mb, Revision: M, Datei veröffentlicht: Jan 3, 2017
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Preise
Status
DS90C241QVS/NOPB | DS90C241QVSX/NOPB | |
---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | Yes |
Verpackung
DS90C241QVS/NOPB | DS90C241QVSX/NOPB | |
---|---|---|
N | 1 | 2 |
Pin | 48 | 48 |
Package Type | PFB | PFB |
Industry STD Term | TQFP | TQFP |
JEDEC Code | S-PQFP-G | S-PQFP-G |
Package QTY | 250 | 1000 |
Device Marking | QVS | QVS |
Width (mm) | 7 | 7 |
Length (mm) | 7 | 7 |
Thickness (mm) | 1 | 1 |
Pitch (mm) | .5 | .5 |
Max Height (mm) | 1.2 | 1.2 |
Mechanical Data | Herunterladen | Herunterladen |
Carrier | LARGE T&R |
Parameter
Parameters / Models | DS90C241QVS/NOPB | DS90C241QVSX/NOPB |
---|---|---|
Color Depth, bpp | 18 | 18 |
Diagnostics | - | - |
EMI Reduction | - | - |
Function | Serializer | Serializer |
Input Compatibility | LVCMOS | LVCMOS |
Operating Temperature Range, C | -40 to 105 | -40 to 105 |
Output Compatibility | FPD-Link LVDS | FPD-Link LVDS |
Package Group | TQFP | TQFP |
Package Size: mm2:W x L, PKG | 48TQFP: 81 mm2: 9 x 9(TQFP) | 48TQFP: 81 mm2: 9 x 9(TQFP) |
Pixel Clock Min, MHz | 5 | 5 |
Pixel Clock(Max), MHz | 35 | 35 |
Rating | Automotive | Automotive |
Signal Conditioning | Pre-Emphasis,VOD Select | Pre-Emphasis,VOD Select |
Special Features | - | - |
Total Throughput, Mbps | 840 | 840 |
Öko-Plan
DS90C241QVS/NOPB | DS90C241QVSX/NOPB | |
---|---|---|
RoHS | Compliant | Compliant |
Anwendungshinweise
- LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)PDF, 101 Kb, Revision: A, Datei veröffentlicht: Apr 29, 2013
This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions. - Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A)PDF, 118 Kb, Revision: A, Datei veröffentlicht: Apr 26, 2013
TI's family of embedded clock LVDS SER/DES (FPD-link II) provides a 2-wire serial interface for displayapplications up to distances of 10 meters.
Modellreihe
Serie: DS90C241-Q1 (2)
Herstellerklassifikation
- Semiconductors> Interface> Display & Imaging SerDes> FPD-Link II SerDes