Datasheet Texas Instruments DS25BR110TSDX/NOPB — Datenblatt

HerstellerTexas Instruments
SerieDS25BR110
ArtikelnummerDS25BR110TSDX/NOPB
Datasheet Texas Instruments DS25BR110TSDX/NOPB

3.125 Gbit / s LVDS-Puffer mit Empfangsausgleich 8-WSON -40 bis 85

Datenblätter

DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization datasheet
PDF, 879 Kb, Revision: E, Datei veröffentlicht: Apr 14, 2013
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Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin8
Package TypeNGQ
Industry STD TermWSON
JEDEC CodeS-PDSO-N
Package QTY4500
CarrierLARGE T&R
Device Marking2R110
Width (mm)3
Length (mm)3
Thickness (mm).8
Pitch (mm).5
Max Height (mm).8
Mechanical DataHerunterladen

Parameter

Device TypeBuffer
ESD HBM7 kV
FunctionEqualizer
ICC(Max)43 mA
Operating Temperature Range-40 to 85 C
Package GroupWSON
Package Size: mm2:W x LSee datasheet (WSON) PKG
ProtocolsLVDS

Öko-Plan

RoHSCompliant

Design Kits und Evaluierungsmodule

  • Evaluation Modules & Boards: DS25BR100EVK
    3.125 Gbps LVDS Single Channel Buffers with Transmit Pre-emphasis and Receive Equalization family
    Lifecycle Status: Active (Recommended for new designs)

Anwendungshinweise

  • Extending the Signal Path Over Data Trans Lines Using LVDS Signal Conditioning
    PDF, 575 Kb, Datei veröffentlicht: Aug 2, 2007
  • LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)
    PDF, 101 Kb, Revision: A, Datei veröffentlicht: Apr 29, 2013
    This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions.
  • AN-1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter (Rev. A)
    PDF, 275 Kb, Revision: A, Datei veröffentlicht: Apr 26, 2013
    Jitter is a phenomenon troubling many designers of high-speed interfaces. It reduces available timingmargin, limits transmission distance between a transmitter and a receiver, and increases system cost bydemanding better performing and more expensive interconnects. LVDS interfaces are not spared fromthese ill effects as they now operate at bit rates exceeding the 3 Gbps mark. Texas Instrumen

Modellreihe

Serie: DS25BR110 (2)

Herstellerklassifikation

  • Semiconductors > Interface > LVDS/M-LVDS/PECL > Buffers, Drivers/Receivers and Cross-Points