Datasheet Texas Instruments DS25BR100TSD/NOPB — Datenblatt
| Hersteller | Texas Instruments |
| Serie | DS25BR100 |
| Artikelnummer | DS25BR100TSD/NOPB |
3.125 Gbit / s LVDS-Puffer mit Sendevorbetonung und Empfangsausgleich 8-WSON -40 bis 85
Datenblätter
DS25BR100/101 3.125Gbps LVDS Buffer w/Transmit Pre-Empha & Rcve Equalization datasheet
PDF, 866 Kb, Revision: F, Datei veröffentlicht: Apr 14, 2013
Auszug aus dem Dokument
Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Verpackung
| Pin | 8 |
| Package Type | NGQ |
| Industry STD Term | WSON |
| JEDEC Code | S-PDSO-N |
| Package QTY | 1000 |
| Carrier | SMALL T&R |
| Device Marking | 2R100 |
| Width (mm) | 3 |
| Length (mm) | 3 |
| Thickness (mm) | .8 |
| Pitch (mm) | .5 |
| Max Height (mm) | .8 |
| Mechanical Data | Herunterladen |
Parameter
| Device Type | Buffer |
| ESD HBM | 7 kV |
| Function | Repeater |
| ICC(Max) | 43 mA |
| Operating Temperature Range | -40 to 85 C |
| Package Group | WSON |
| Package Size: mm2:W x L | See datasheet (WSON) PKG |
| Protocols | LVDS |
Öko-Plan
| RoHS | Compliant |
Design Kits und Evaluierungsmodule
- Evaluation Modules & Boards: DS25BR100EVK
3.125 Gbps LVDS Single Channel Buffers with Transmit Pre-emphasis and Receive Equalization family
Lifecycle Status: Active (Recommended for new designs)
Anwendungshinweise
- LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)PDF, 101 Kb, Revision: A, Datei veröffentlicht: Apr 29, 2013
This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions. - AN-1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter (Rev. A)PDF, 275 Kb, Revision: A, Datei veröffentlicht: Apr 26, 2013
Jitter is a phenomenon troubling many designers of high-speed interfaces. It reduces available timingmargin, limits transmission distance between a transmitter and a receiver, and increases system cost bydemanding better performing and more expensive interconnects. LVDS interfaces are not spared fromthese ill effects as they now operate at bit rates exceeding the 3 Gbps mark. Texas Instrumen
Modellreihe
Serie: DS25BR100 (1)
- DS25BR100TSD/NOPB
Herstellerklassifikation
- Semiconductors > Interface > LVDS/M-LVDS/PECL > Buffers, Drivers/Receivers and Cross-Points