Datasheet Texas Instruments DLP6500BFYE — Datenblatt
| Hersteller | Texas Instruments |
| Serie | DLP6500FYE |
| Artikelnummer | DLP6500BFYE |
DLP® 0,65 1080p s600 DMD 350-CPGA
Datenblätter
DLP6500 0.65 1080p MVSP S600 DMD datasheet
PDF, 909 Kb, Revision: B, Datei veröffentlicht: Oct 31, 2016
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Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 350 |
| Package Type | FYE |
| Industry STD Term | CPGA |
| JEDEC Code | R-CPGA-P |
| Package QTY | 1 |
| Carrier | JEDEC TRAY (5+1) |
| Width (mm) | 32.2 |
| Length (mm) | 35 |
| Thickness (mm) | 2.95 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 3.19 |
| Mechanical Data | Herunterladen |
Parameter
| # Triggers | N/A Input / Output |
| Chipset Family | DLP6500FYE |
| Component Type | DMD |
| Display Resolution | 1080p |
| Illumination Wavelength Range | 420-700 nm |
| Max Pattern Rate, 8-bit | 1446 Hz |
| Max Pattern Rate, Binary | 11574 Hz |
| Max Pixel Data Rate | 24 Gbps |
| Micromirror Array Orientation | Orthogonal |
| Micromirror Array Size | 1920x1080 |
| Micromirror Driver Support | Integrated |
| Micromirror Pitch | 7.6 um |
| Package Group | CPGA |
| Power Consumption, Typical | 6300 mW |
| Thermal Dissipation | 0.6 В°C/W |
Öko-Plan
| RoHS | Compliant |
Design Kits und Evaluierungsmodule
- Evaluation Modules & Boards: DLPLCR6500EVM
DLPВ® LightCrafterВ™ 6500 Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Anwendungshinweise
- DLP Series-600 DMD Mechanical, Thermal, and System Mounting Concepts ApplicationPDF, 1.8 Mb, Datei veröffentlicht: Dec 12, 2014
- Mounting Hardware and Quick Reference Guide for DLPВ® Advanced Light Control DMDsPDF, 383 Kb, Datei veröffentlicht: Jul 20, 2016
Modellreihe
Serie: DLP6500FYE (2)
- DLP6500BFYE DLP6500FYE
Herstellerklassifikation
- Semiconductors > DLP Products > Advanced Light Control > High Speed Visible