Datasheet Texas Instruments DAC5682Z — Datenblatt

HerstellerTexas Instruments
SerieDAC5682Z
Datasheet Texas Instruments DAC5682Z

Zweikanaliger 16-Bit-, 1,0-GSPS-, 1x-4x-Interpolations-Digital-Analog-Wandler (DAC)

Datenblätter

DAC5682Z 16-Bit, 1.0 GSPS 2x-4x Interpolating Dual-Channel Digital-to-Analog Converter (DAC) datasheet
PDF, 3.6 Mb, Revision: F, Datei veröffentlicht: Jan 20, 2015
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Preise

Status

DAC5682ZIRGCDAC5682ZIRGCRDAC5682ZIRGCT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesYes

Verpackung

DAC5682ZIRGCDAC5682ZIRGCRDAC5682ZIRGCT
N123
Pin646464
Package TypeRGCRGCRGC
Industry STD TermVQFNVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY2502000250
CarrierSMALL T&RLARGE T&RSMALL T&R
Device MarkingDAC5682ZIDAC5682ZIDAC5682ZI
Width (mm)999
Length (mm)999
Thickness (mm).88.88.88
Pitch (mm).5.5.5
Max Height (mm)111
Mechanical DataHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsDAC5682ZIRGC
DAC5682ZIRGC
DAC5682ZIRGCR
DAC5682ZIRGCR
DAC5682ZIRGCT
DAC5682ZIRGCT
ArchitectureCurrent SinkCurrent SinkCurrent Sink
DAC Channels222
InterfaceParallel LVDSParallel LVDSParallel LVDS
Interpolation1x,2x,4x1x,2x,4x1x,2x,4x
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Package GroupVQFNVQFNVQFN
Package Size: mm2:W x L, PKG64VQFN: 81 mm2: 9 x 9(VQFN)64VQFN: 81 mm2: 9 x 9(VQFN)64VQFN: 81 mm2: 9 x 9(VQFN)
Power Consumption(Typ), mW130013001300
RatingCatalogCatalogCatalog
Resolution, Bits161616
SFDR, dB818181
Sample / Update Rate, MSPS100010001000

Öko-Plan

DAC5682ZIRGCDAC5682ZIRGCRDAC5682ZIRGCT
RoHSCompliantCompliantCompliant

Anwendungshinweise

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    PDF, 319 Kb, Datei veröffentlicht: Jul 14, 2009
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    PDF, 244 Kb, Datei veröffentlicht: Nov 10, 2008
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    PDF, 2.1 Mb, Datei veröffentlicht: Jul 14, 2009
  • High Speed Digital-to-Analog Converters Basics (Rev. A)
    PDF, 829 Kb, Revision: A, Datei veröffentlicht: Oct 23, 2012
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Datei veröffentlicht: Jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Datei veröffentlicht: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers

Modellreihe

Herstellerklassifikation

  • Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> High Speed DACs (>10MSPS)