Datasheet Texas Instruments DAC38RF89IAAVR — Datenblatt
| Hersteller | Texas Instruments |
| Serie | DAC38RF89 |
| Artikelnummer | DAC38RF89IAAVR |
Zweikanaliger 14-Bit-, 8,4-GSPS-, 1x-24x-Interpolations-, 5- und 7,5-GHz-PLL-Digital-Analog-Wandler 144-FCBGA -40 bis 85
Datenblätter
DAC38RF8x Dual-Channel, Differential-Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface, On-Chip PLL and Wide-Band Interpolation datasheet
PDF, 4.0 Mb, Revision: B, Datei veröffentlicht: Aug 18, 2017
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Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 144 |
| Package Type | AAV |
| Industry STD Term | FCBGA |
| JEDEC Code | S-PBGA-N |
| Package QTY | 1000 |
| Carrier | LARGE T&R |
| Device Marking | DAC38RF89I |
| Width (mm) | 10 |
| Length (mm) | 10 |
| Thickness (mm) | 1.45 |
| Pitch (mm) | .8 |
| Max Height (mm) | 1.94 |
| Mechanical Data | Herunterladen |
Parameter
| Architecture | Current Source |
| DAC Channels | 2 |
| Interface | JESD204B |
| Interpolation | 1x,2x,4x,6x,8x,10x,12x,16x,18x,20x,24x |
| Operating Temperature Range | -40 to 85 C |
| Package Group | FCBGA |
| Package Size: mm2:W x L | See datasheet (FCBGA) PKG |
| Power Consumption(Typ) | 3800 mW |
| Rating | Catalog |
| Resolution | 14 Bits |
| SFDR | 72 dB |
| Sample / Update Rate | 8400 MSPS |
Öko-Plan
| RoHS | Compliant |
Design Kits und Evaluierungsmodule
- Evaluation Modules & Boards: DAC38RF89EVM
DAC38RF89 Dual-Channel, 14-Bit, 8.4GSPS, 1x-24x Interpolating, 5 & 7.5 GHz PLL DAC Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Anwendungshinweise
- DAC38RF8x Test ModesPDF, 3.0 Mb, Datei veröffentlicht: Jul 25, 2017
The DAC38RF8x family of devices comes equipped with multiple test modes to assist users in verifying systems in rapid prototyping situations. This application report covers two of the available tests, the pseudorandom binary-sequence test and JESD204B short pattern test, in detail using the TI DAC38RF8xEVM and TSW14J56EVM capture card. - Quick-Start Methods in Simulating the DAC38RF8x Input/Output Buffer InformationPDF, 600 Kb, Datei veröffentlicht: Aug 2, 2017
Input/output Buffer Information Specification (IBIS) models are used to simulate digital electrical interfaces.These models can be categorized into two main categories: traditional and algorithmic modeling interface(AMI). AMI is typically used for SerDes channel simulation, and is different from the traditional IBIS model,which is the focus of this document. These models are simple ASCII tex - Eye Scan Testing with the DAC38RFxxPDF, 3.6 Mb, Datei veröffentlicht: Aug 10, 2017
The DAC38RFxx family of devices comes equipped with the capability to generate eye diagrams by usinging JTAG communication with the DAC38RF8x eye scan GUI software. By running this software, users can generate eye diagrams to compare with the JESD204B standard eye mask requirements, and verify signal integrity performance of the SerDes link between DAC and FPGA/ASIC. This application report descri
Modellreihe
Serie: DAC38RF89 (2)
- DAC38RF89IAAV DAC38RF89IAAVR
Herstellerklassifikation
- Semiconductors > Data Converters > Digital-to-Analog Converters (DACs) > High Speed DACs (>10MSPS)