Datasheet Texas Instruments CDCVF25081 — Datenblatt

HerstellerTexas Instruments
SerieCDCVF25081
Datasheet Texas Instruments CDCVF25081

1: 8 3,3-V-Phasenregelkreis-Treiber

Datenblätter

3.3V Phased-Lock Loop Clock Driver datasheet
PDF, 632 Kb, Revision: A, Datei veröffentlicht: Feb 6, 2003
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Preise

Status

CDCVF25081DCDCVF25081DG4CDCVF25081DRCDCVF25081DRG4CDCVF25081PWCDCVF25081PWG4CDCVF25081PWRCDCVF25081PWRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoYesYesNoNoYesNo

Verpackung

CDCVF25081DCDCVF25081DG4CDCVF25081DRCDCVF25081DRG4CDCVF25081PWCDCVF25081PWG4CDCVF25081PWRCDCVF25081PWRG4
N12345678
Pin1616161616161616
Package TypeDDDDPWPWPWPW
Industry STD TermSOICSOICSOICSOICTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY404025002500909020002000
CarrierTUBETUBELARGE T&RLARGE T&RTUBETUBELARGE T&RLARGE T&R
Device MarkingCKV25081CKV25081CKV25081CKV25081CK081CK081CK081CK081
Width (mm)3.913.913.913.914.44.44.44.4
Length (mm)9.99.99.99.95555
Thickness (mm)1.581.581.581.581111
Pitch (mm)1.271.271.271.27.65.65.65.65
Max Height (mm)1.751.751.751.751.21.21.21.2
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsCDCVF25081D
CDCVF25081D
CDCVF25081DG4
CDCVF25081DG4
CDCVF25081DR
CDCVF25081DR
CDCVF25081DRG4
CDCVF25081DRG4
CDCVF25081PW
CDCVF25081PW
CDCVF25081PWG4
CDCVF25081PWG4
CDCVF25081PWR
CDCVF25081PWR
CDCVF25081PWRG4
CDCVF25081PWRG4
Absolute Jitter (Peak-to-Peak Cycle or Period Jitter), ps100100100100100100100100
Number of Outputs88888888
Operating Frequency Range(Max), MHz200200200200200200200200
Operating Frequency Range(Min), MHz1010101010101010
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupSOICSOICSOICSOICTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
VCC, V3.33.33.33.33.33.33.33.3
t(phase error), ps200200200200200200200200
tsk(o), ps150150150150150150150150

Öko-Plan

CDCVF25081DCDCVF25081DG4CDCVF25081DRCDCVF25081DRG4CDCVF25081PWCDCVF25081PWG4CDCVF25081PWRCDCVF25081PWRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Anwendungshinweise

  • Using TI's CDCVF2310 and CDCVF25081 with TLK1501 Serial Transceiver
    PDF, 1.2 Mb, Datei veröffentlicht: May 14, 2003
    This test report discusses jitter transfer of the TI CDCVF2310 and CDCVF25081 clock drivers when driving the TI TLK1501 serial gigabit transceiver at 600 Mbit/sec. This application report summarizes the peak-to-peak and RMS jitter measurements taken during the testing of the clock drivers with the TLK1501. The CDCVF2310 is a high performance clock buffer that provides 10 low-skew copies of CLK at

Modellreihe

Herstellerklassifikation

  • Semiconductors> Clock and Timing> Clock Buffers> Zero Delay Buffers