Datasheet Texas Instruments CDCLVD2102 — Datenblatt

HerstellerTexas Instruments
SerieCDCLVD2102
Datasheet Texas Instruments CDCLVD2102

Low Jitter, Dual 1: 2 Universal-zu-LVDS-Puffer

Datenblätter

Dual 1:2 Low Additive Jitter LVDS Buffer datasheet
PDF, 1.0 Mb, Revision: A, Datei veröffentlicht: Jun 15, 2010
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Preise

Status

CDCLVD2102RGTRCDCLVD2102RGTT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYes

Verpackung

CDCLVD2102RGTRCDCLVD2102RGTT
N12
Pin1616
Package TypeRGTRGT
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY3000250
CarrierLARGE T&RSMALL T&R
Device MarkingD2102D2102
Width (mm)33
Length (mm)33
Thickness (mm).9.9
Pitch (mm).5.5
Max Height (mm)11
Mechanical DataHerunterladenHerunterladen

Parameter

Parameters / ModelsCDCLVD2102RGTR
CDCLVD2102RGTR
CDCLVD2102RGTT
CDCLVD2102RGTT
Additive RMS Jitter(Typ), fs171171
Input Frequency(Max), MHz800800
Input LevelLVCMOS,LVDS,LVPECLLVCMOS,LVDS,LVPECL
Number of Outputs44
Operating Temperature Range, C-40 to 85-40 to 85
Output Frequency(Max), MHz800800
Output LevelLVDSLVDS
Package GroupVQFNVQFN
Package Size: mm2:W x L, PKG16VQFN: 9 mm2: 3 x 3(VQFN)16VQFN: 9 mm2: 3 x 3(VQFN)
RatingCatalogCatalog
VCC, V2.52.5
VCC Out, V2.52.5

Öko-Plan

CDCLVD2102RGTRCDCLVD2102RGTT
RoHSCompliantCompliant

Modellreihe

Serie: CDCLVD2102 (2)

Herstellerklassifikation

  • Semiconductors> Clock and Timing> Clock Buffers> Differential