Datasheet Texas Instruments CDCLVC1112PW — Datenblatt

HerstellerTexas Instruments
SerieCDCLVC1112
ArtikelnummerCDCLVC1112PW
Datasheet Texas Instruments CDCLVC1112PW

Low Jitter, 1:12 LVCMOS Fan-Out-Taktpuffer 24-TSSOP -40 bis 85

Datenblätter

CDCLVC11xx 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer Family datasheet
PDF, 1.6 Mb, Revision: B, Datei veröffentlicht: Feb 24, 2017
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Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin24
Package TypePW
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY60
CarrierTUBE
Device MarkingC9CC
Width (mm)4.4
Length (mm)7.8
Thickness (mm)1
Pitch (mm).65
Max Height (mm)1.2
Mechanical DataHerunterladen

Parameter

Additive RMS Jitter(Typ)70 fs
Input Frequency(Max)250 MHz
Input LevelLVCMOS
Number of Outputs12
Operating Temperature Range-40 to 85 C
Output Frequency(Max)250 MHz
Output LevelLVCMOS
Package GroupTSSOP
Package Size: mm2:W x L24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) PKG
RatingCatalog
VCC Out2.5,3.3 V

Öko-Plan

RoHSCompliant

Design Kits und Evaluierungsmodule

  • Evaluation Modules & Boards: CDCLVC1112EVM
    CDCLVC1112 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

Anwendungshinweise

  • How to Apply 1.8-V Signals to 3.3-V CDCLVC11xx Fanout Clock Buffer
    PDF, 518 Kb, Datei veröffentlicht: Nov 30, 2010
    The CDCLVC11xx buffer family from Texas Instruments has a nominal voltage supply of 2.5 V and 3.3 V. With the simple employment of an external RC network, this family of devices can handle incoming signals whose voltage levels go up to 1.8 V. This application report explains how to implement this network and dimension its discrete components, without impacting the specifications of additive ji

Modellreihe

Serie: CDCLVC1112 (2)

Herstellerklassifikation

  • Semiconductors > Clock and Timing > Clock Buffers > Single-Ended