Datasheet Texas Instruments CD74AC573M96E4 — Datenblatt

Hersteller	Texas Instruments
Serie	CD74AC573
Artikelnummer	CD74AC573M96E4

Oktale transparente nicht invertierende Latches mit 3-Zustands-Ausgängen 20-SOIC -55 bis 125

Datenblätter

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PDF, 1.3 Mb, Datei veröffentlicht: Dec 3, 1998

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Data sheet acquired from Harris Semiconductor
SCHS291 This data sheet is applicable to the CD74AC563, CD54/74AC573, and CD54/74ACT573. The CD54AC563 and CD54/74ACT563 were
not acquired from Harris Semiconductor. PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 PACKAGING INFORMATION
Orderable Device Status
(1) Package Type Package Pins Package
Drawing
Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (В°C) Device Marking
(4/5) CD54AC573F3A ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 CD54AC573F3A CD54ACT573F3A ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 CD54ACT573F3A CD74AC573E ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -55 to 125 CD74AC573E CD74AC573M ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AC573M CD74AC573M96 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AC573M CD74AC573M96E4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AC573M CD74AC573M96G4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AC573M CD74AC573MG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AC573M CD74ACT573E ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -55 to 125 CD74ACT573E CD74ACT573EE4 ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -55 to 125 CD74ACT573E CD74ACT573M ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 ACT573M CD74ACT573M96 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 ACT573M CD74ACT573MG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 ACT573M (1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available. …

Preise

Status

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

Verpackung

Pin	20
Package Type	DW
Industry STD Term	SOIC
JEDEC Code	R-PDSO-G
Package QTY	2000
Carrier	LARGE T&R
Device Marking	AC573M
Width (mm)	7.5
Length (mm)	12.8
Thickness (mm)	2.35
Pitch (mm)	1.27
Max Height (mm)	2.65
Mechanical Data	Herunterladen

Parameter

3-State Output	Yes
Bits	8
F @ Nom Voltage(Max)	100 Mhz
ICC @ Nom Voltage(Max)	0.08 mA
Operating Temperature Range	-55 to 125 C
Output Drive (IOL/IOH)(Max)	24/-24 mA
Package Group	SOIC
Package Size: mm2:W x L	20SOIC: 132 mm2: 10.3 x 12.8(SOIC) PKG
Rating	Catalog
Schmitt Trigger	No
Technology Family	AC
VCC(Max)	5.5 V
VCC(Min)	1.5 V
Voltage(Nom)	1.5,3.3,5 V
tpd @ Nom Voltage(Max)	119,13.4,9.5 ns

Öko-Plan

RoHS

Compliant

Anwendungshinweise

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Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
PDF, 43 Kb, Datei veröffentlicht: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Modellreihe

Serie: CD74AC573 (6)

CD74AC573E CD74AC573M CD74AC573M96 CD74AC573M96E4 CD74AC573M96G4 CD74AC573MG4

Herstellerklassifikation

Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Latch