Datasheet Texas Instruments CD74AC240 — Datenblatt

Hersteller	Texas Instruments
Serie	CD74AC240

Oktalinvertierende Puffer- / Leitungstreiber mit 3-Zustands-Ausgängen

Datenblätter

PDF, 1.2 Mb, Revision: B, Datei veröffentlicht: Jan 19, 2004

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	CD74AC240E	CD74AC240EE4	CD74AC240M	CD74AC240M96
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	No	No	No	No

	CD74AC240E	CD74AC240EE4	CD74AC240M	CD74AC240M96
N	1	2	3	4
Pin	20	20	20	20
Package Type	N	N	DW	DW
Industry STD Term	PDIP	PDIP	SOIC	SOIC
JEDEC Code	R-PDIP-T	R-PDIP-T	R-PDSO-G	R-PDSO-G
Package QTY	20	20	25	2000
Carrier	TUBE	TUBE	TUBE	LARGE T&R
Device Marking	CD74AC240E	CD74AC240E	AC240M	AC240M
Width (mm)	6.35	6.35	7.5	7.5
Length (mm)	24.33	24.33	12.8	12.8
Thickness (mm)	4.57	4.57	2.35	2.35
Pitch (mm)	2.54	2.54	1.27	1.27
Max Height (mm)	5.08	5.08	2.65	2.65
Mechanical Data	Herunterladen	Herunterladen	Herunterladen	Herunterladen

Parameters / Models	CD74AC240E	CD74AC240EE4	CD74AC240M	CD74AC240M96
Bits	8	8	8	8
F @ Nom Voltage(Max), Mhz	100	100	100	100
ICC @ Nom Voltage(Max), mA	0.08	0.08	0.08	0.08
Operating Temperature Range, C	-55 to 125	-55 to 125	-55 to 125	-55 to 125
Output Drive (IOL/IOH)(Max), mA	-24/24	-24/24	-24/24	-24/24
Package Group	PDIP	PDIP	SOIC	SOIC
Package Size: mm2:W x L, PKG	See datasheet (PDIP)	See datasheet (PDIP)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)
Rating	Catalog	Catalog	Catalog	Catalog
Schmitt Trigger	No	No	No	No
Technology Family	AC	AC	AC	AC
VCC(Max), V	5.5	5.5	5.5	5.5
VCC(Min), V	1.5	1.5	1.5	1.5
Voltage(Nom), V	1.5,3.3,5	1.5,3.3,5	1.5,3.3,5	1.5,3.3,5
tpd @ Nom Voltage(Max), ns	82,9.2,6.5	82,9.2,6.5	82,9.2,6.5	82,9.2,6.5

	CD74AC240E	CD74AC240EE4	CD74AC240M	CD74AC240M96
RoHS	Compliant	Compliant	Compliant	Compliant
Pb Free	Yes	Yes

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Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
PDF, 43 Kb, Datei veröffentlicht: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Serie: CD74AC240 (4)