Datasheet Texas Instruments CD54ACT112F3A — Datenblatt

HerstellerTexas Instruments
SerieCD54ACT112
ArtikelnummerCD54ACT112F3A
Datasheet Texas Instruments CD54ACT112F3A

Dual Negative Edge Triggered JK Flip-Flops mit Set und Reset 16-CDIP -55 auf 125

Datenblätter

CD54ACT112, CD74ACT112 datasheet
PDF, 796 Kb, Datei veröffentlicht: Jan 17, 2003
Auszug aus dem Dokument

Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin16
Package TypeJ
Industry STD TermCDIP
JEDEC CodeR-GDIP-T
Package QTY1
CarrierTUBE
Device MarkingCD54ACT112F3A
Width (mm)6.92
Length (mm)19.56
Thickness (mm)4.57
Pitch (mm)2.54
Max Height (mm)5.08
Mechanical DataHerunterladen

Parameter

Bits2
F @ Nom Voltage(Max)90 Mhz
ICC @ Nom Voltage(Max)0.04 mA
Input TypeTTL
Operating Temperature Range-55 to 125 C
Output Drive (IOL/IOH)(Max)-24/24 mA
Output TypeCMOS
Package GroupCDIP
Package Size: mm2:W x LSee datasheet (CDIP) PKG
RatingMilitary
Technology FamilyACT
VCC(Max)5.5 V
VCC(Min)4.5 V
tpd @ Nom Voltage(Max)11.1 ns

Öko-Plan

RoHSSee ti.com

Anwendungshinweise

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    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, Revision: B, Datei veröffentlicht: Jun 1, 1997
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  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revision: A, Datei veröffentlicht: Feb 6, 2015
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, Revision: C, Datei veröffentlicht: Jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, Datei veröffentlicht: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Modellreihe

Serie: CD54ACT112 (1)
  • CD54ACT112F3A

Herstellerklassifikation

  • Semiconductors > Space & High Reliability > Logic Products > Flip-Flop/Latch/Registers