Datasheet Texas Instruments CD4572UB — Datenblatt

HerstellerTexas Instruments
SerieCD4572UB
Datasheet Texas Instruments CD4572UB

CMOS-Hex-Gate (mit 4 Invertern, einem NOR-Gatter mit 2 Eingängen und einem NAND-Gatter mit 2 Eingängen)

Datenblätter

CD4572UB TYPES datasheet
PDF, 1.1 Mb, Revision: C, Datei veröffentlicht: Oct 13, 2003
Auszug aus dem Dokument

Preise

Status

CD4572UBECD4572UBEE4CD4572UBMCD4572UBME4CD4572UBMG4CD4572UBNSRCD4572UBPWRCD4572UBPWRE4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNo

Verpackung

CD4572UBECD4572UBEE4CD4572UBMCD4572UBME4CD4572UBMG4CD4572UBNSRCD4572UBPWRCD4572UBPWRE4
N12345678
Pin1616161616161616
Package TypeNNDDDNSPWPW
Industry STD TermPDIPPDIPSOICSOICSOICSOPTSSOPTSSOP
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2525404040200020002000
CarrierTUBETUBETUBETUBETUBELARGE T&RLARGE T&RLARGE T&R
Device MarkingCD4572UBECD4572UBECD4572UBMCD4572UBMCD4572UBMCD4572UBCM572UBCM572UB
Width (mm)6.356.353.913.913.915.34.44.4
Length (mm)19.319.39.99.99.910.355
Thickness (mm)3.93.91.581.581.581.9511
Pitch (mm)2.542.541.271.271.271.27.65.65
Max Height (mm)5.085.081.751.751.7521.21.2
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsCD4572UBE
CD4572UBE
CD4572UBEE4
CD4572UBEE4
CD4572UBM
CD4572UBM
CD4572UBME4
CD4572UBME4
CD4572UBMG4
CD4572UBMG4
CD4572UBNSR
CD4572UBNSR
CD4572UBPWR
CD4572UBPWR
CD4572UBPWRE4
CD4572UBPWRE4
Bits66666666
F @ Nom Voltage(Max), Mhz88888888
ICC @ Nom Voltage(Max), mA0.0150.0150.0150.0150.0150.0150.0150.015
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA4/-44/-44/-44/-44/-44/-44/-44/-4
Package GroupPDIPPDIPSOICSOICSOICSOTSSOPTSSOP
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SO: 80 mm2: 7.8 x 10.2(SO)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Technology FamilyCD4000CD4000CD4000CD4000CD4000CD4000CD4000CD4000
VCC(Max), V1818181818181818
VCC(Min), V33333333
Voltage(Nom), V1010101010101010
tpd @ Nom Voltage(Max), ns110110110110110110110110

Öko-Plan

CD4572UBECD4572UBEE4CD4572UBMCD4572UBME4CD4572UBMG4CD4572UBNSRCD4572UBPWRCD4572UBPWRE4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYes

Anwendungshinweise

  • Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics
    PDF, 188 Kb, Datei veröffentlicht: Dec 3, 2001
    Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb

Modellreihe

Herstellerklassifikation

  • Semiconductors> Logic> Specialty Logic> Miscellaneous Gate and Delay Elements