Datasheet Texas Instruments CD40102B — Datenblatt
| Hersteller | Texas Instruments |
| Serie | CD40102B |
CMOS 8-stufiger voreingestellter 2-Dekaden-BCD-Synchron-Abwärtszähler
Datenblätter
CD40102B, CD40103B TYPES datasheet
PDF, 1.2 Mb, Revision: B, Datei veröffentlicht: Jun 27, 2003
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Preise
Status
| CD40102BE | CD40102BEE4 | CD40102BNSR | CD40102BPW | CD40102BPWG4 | CD40102BPWR | |
|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No | No | No | No |
Verpackung
| CD40102BE | CD40102BEE4 | CD40102BNSR | CD40102BPW | CD40102BPWG4 | CD40102BPWR | |
|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 |
| Pin | 16 | 16 | 16 | 16 | 16 | 16 |
| Package Type | N | N | NS | PW | PW | PW |
| Industry STD Term | PDIP | PDIP | SOP | TSSOP | TSSOP | TSSOP |
| JEDEC Code | R-PDIP-T | R-PDIP-T | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 25 | 25 | 2000 | 90 | 90 | 2000 |
| Carrier | TUBE | TUBE | LARGE T&R | TUBE | TUBE | LARGE T&R |
| Device Marking | CD40102BE | CD40102BE | CD40102B | CM0102B | CM0102B | CM0102B |
| Width (mm) | 6.35 | 6.35 | 5.3 | 4.4 | 4.4 | 4.4 |
| Length (mm) | 19.3 | 19.3 | 10.3 | 5 | 5 | 5 |
| Thickness (mm) | 3.9 | 3.9 | 1.95 | 1 | 1 | 1 |
| Pitch (mm) | 2.54 | 2.54 | 1.27 | .65 | .65 | .65 |
| Max Height (mm) | 5.08 | 5.08 | 2 | 1.2 | 1.2 | 1.2 |
| Mechanical Data | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen |
Parameter
| Parameters / Models | CD40102BE | CD40102BEE4 | CD40102BNSR | CD40102BPW | CD40102BPWG4 | CD40102BPWR |
|---|---|---|---|---|---|---|
| Bits | 1 | 1 | 1 | 1 | 1 | 1 |
| F @ Nom Voltage(Max), Mhz | 8 | 8 | 8 | 8 | 8 | 8 |
| Function | Counter | Counter | Counter | Counter | Counter | Counter |
| ICC @ Nom Voltage(Max), mA | 0.03 | 0.03 | 0.03 | 0.03 | 0.03 | 0.03 |
| Operating Temperature Range, C | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 |
| Output Drive (IOL/IOH)(Max), mA | 1.5/-1.5 | 1.5/-1.5 | 1.5/-1.5 | 1.5/-1.5 | 1.5/-1.5 | 1.5/-1.5 |
| Package Group | PDIP | PDIP | SO | TSSOP | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | See datasheet (PDIP) | See datasheet (PDIP) | 16SO: 80 mm2: 7.8 x 10.2(SO) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Technology Family | CD4000 | CD4000 | CD4000 | CD4000 | CD4000 | CD4000 |
| Type | Decade | Decade | Decade | Decade | Decade | Decade |
| VCC(Max), V | 18 | 18 | 18 | 18 | 18 | 18 |
| VCC(Min), V | 3 | 3 | 3 | 3 | 3 | 3 |
| Voltage(Nom), V | 5,10,15 | 5,10,15 | 5,10,15 | 5,10,15 | 5,10,15 | 5,10,15 |
| tpd @ Nom Voltage(Max), ns | 260 | 260 | 260 | 260 | 260 | 260 |
Öko-Plan
| CD40102BE | CD40102BEE4 | CD40102BNSR | CD40102BPW | CD40102BPWG4 | CD40102BPWR | |
|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
| Pb Free | Yes | Yes |
Anwendungshinweise
- Understanding Buffered and Unbuffered CD4xxxB Series Device CharacteristicsPDF, 188 Kb, Datei veröffentlicht: Dec 3, 2001
Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb
Modellreihe
Serie: CD40102B (6)
Herstellerklassifikation
- Semiconductors> Logic> Specialty Logic> Counter/Arithmetic/Parity Function