Datasheet Texas Instruments ADS8555 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | ADS8555 |
16-Bit-ADC mit 6 Kanälen und gleichzeitiger Abtastung
Datenblätter
ADS8555 16-Bit, Six-Channel, Simultaneous Sampling Analog-to-Digital Converter datasheet
PDF, 1.2 Mb, Revision: D, Datei veröffentlicht: Feb 3, 2016
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Preise
Status
| ADS8555SPM | ADS8555SPMR | |
|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | Yes |
Verpackung
| ADS8555SPM | ADS8555SPMR | |
|---|---|---|
| N | 1 | 2 |
| Pin | 64 | 64 |
| Package Type | PM | PM |
| Industry STD Term | LQFP | LQFP |
| JEDEC Code | S-PQFP-G | S-PQFP-G |
| Package QTY | 160 | 1000 |
| Carrier | TUBE | LARGE T&R |
| Device Marking | 8555 | ADS |
| Width (mm) | 10 | 10 |
| Length (mm) | 10 | 10 |
| Thickness (mm) | 1.4 | 1.4 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1.6 | 1.6 |
| Mechanical Data | Herunterladen | Herunterladen |
Parameter
| Parameters / Models | ADS8555SPM | ADS8555SPMR |
|---|---|---|
| # Input Channels | 6 | 6 |
| Analog Voltage AVDD(Max), V | 5.5 | 5.5 |
| Analog Voltage AVDD(Min), V | 4.5 | 4.5 |
| Architecture | SAR | SAR |
| Digital Supply(Max), V | 5.5 | 5.5 |
| Digital Supply(Min), V | 2.7 | 2.7 |
| INL(Max), +/-LSB | 3 | 3 |
| Input Range(Max), V | 12 | 12 |
| Input Range(Min), V | -12 | -12 |
| Input Type | Single-Ended | Single-Ended |
| Integrated Features | Daisy-Chainable,Oscillator | Daisy-Chainable,Oscillator |
| Interface | Parallel,SPI | Parallel,SPI |
| Multi-Channel Configuration | Simultaneous Sampling | Simultaneous Sampling |
| Operating Temperature Range, C | -40 to 125 | -40 to 125 |
| Package Group | LQFP | LQFP |
| Package Size: mm2:W x L, PKG | 64LQFP: 144 mm2: 12 x 12(LQFP) | 64LQFP: 144 mm2: 12 x 12(LQFP) |
| Power Consumption(Typ), mW | 335 | 335 |
| Rating | Catalog | Catalog |
| Reference Mode | Ext,Int | Ext,Int |
| Resolution, Bits | 16 | 16 |
| SINAD, dB | 89.5 | 89.5 |
| SNR, dB | 91.5 | 91.5 |
| Sample Rate (max), SPS | 630kSPS | 630kSPS |
| Sample Rate(Max), MSPS | 0.63 | 0.63 |
| THD(Typ), dB | -94 | -94 |
Öko-Plan
| ADS8555SPM | ADS8555SPMR | |
|---|---|---|
| RoHS | Compliant | Compliant |
Anwendungshinweise
- Driver Circuit Design Considerations for ADS855xPDF, 1.3 Mb, Datei veröffentlicht: Aug 27, 2012
- Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Modellreihe
Serie: ADS8555 (2)
Herstellerklassifikation
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)