Datasheet Texas Instruments ADS8481 — Datenblatt
Hersteller | Texas Instruments |
Serie | ADS8481 |
18 Bit 1MSPS parallel ADC W / Ref
Datenblätter
18-Bit 1-MSPS Pseudo-Diff Unipolar Input Micro Samp ADC w/Parallell Interface datasheet
PDF, 1.3 Mb, Revision: A, Datei veröffentlicht: Mar 27, 2006
Auszug aus dem Dokument
Preise
Status
ADS8481IBRGZT | ADS8481IBRGZTG4 | ADS8481IRGZT | ADS8481RGZR | |
---|---|---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Preview (Device has been announced but is not in production. Samples may or may not be available) |
Manufacture's Sample Availability | No | No | No | No |
Verpackung
ADS8481IBRGZT | ADS8481IBRGZTG4 | ADS8481IRGZT | ADS8481RGZR | |
---|---|---|---|---|
N | 1 | 2 | 3 | 4 |
Pin | 48 | 48 | 48 | 48 |
Package Type | RGZ | RGZ | RGZ | RGZ |
Industry STD Term | VQFN | VQFN | VQFN | VQFN |
JEDEC Code | S-PQFP-N | S-PQFP-N | S-PQFP-N | S-PQFP-N |
Package QTY | 250 | 250 | 250 | |
Carrier | SMALL T&R | SMALL T&R | SMALL T&R | |
Device Marking | 8481I | 8481I | ADS | |
Width (mm) | 7 | 7 | 7 | 7 |
Length (mm) | 7 | 7 | 7 | 7 |
Thickness (mm) | .9 | .9 | .9 | .9 |
Pitch (mm) | .5 | .5 | .5 | .5 |
Max Height (mm) | 1 | 1 | 1 | 1 |
Mechanical Data | Herunterladen | Herunterladen | Herunterladen | Herunterladen |
Parameter
Parameters / Models | ADS8481IBRGZT | ADS8481IBRGZTG4 | ADS8481IRGZT | ADS8481RGZR |
---|---|---|---|---|
# Input Channels | 1 | 1 | 1 | 1 |
Analog Voltage AVDD(Max), V | 5.25 | 5.25 | 5.25 | |
Analog Voltage AVDD(Max)(V) | 5.25 | |||
Analog Voltage AVDD(Min), V | 4.75 | 4.75 | 4.75 | |
Analog Voltage AVDD(Min)(V) | 4.75 | |||
Approx. Price (US$) | 16.70 | 1ku | |||
Architecture | SAR | SAR | SAR | SAR |
Digital Supply(Max), V | 5.25 | 5.25 | 5.25 | |
Digital Supply(Max)(V) | 5.25 | |||
Digital Supply(Min), V | 2.7 | 2.7 | 2.7 | |
Digital Supply(Min)(V) | 2.7 | |||
INL(Max), +/-LSB | 3.5 | 3.5 | 3.5 | |
INL(Max)(+/-LSB) | 3.5 | |||
Input Range(Max), V | 4.1 | 4.1 | 4.1 | |
Input Range(Max)(V) | 4.1 | |||
Input Type | Pseudo-Differential,Single-Ended | Pseudo-Differential,Single-Ended | Pseudo-Differential,Single-Ended | Pseudo-Differential Single-Ended |
Integrated Features | Oscillator | Oscillator | Oscillator | Oscillator |
Interface | Parallel | Parallel | Parallel | Parallel |
Multi-Channel Configuration | N/A | N/A | N/A | N/A |
Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | |
Operating Temperature Range(C) | -40 to 85 | |||
Package Group | VQFN | VQFN | VQFN | VQFN |
Package Size: mm2:W x L, PKG | 48VQFN: 49 mm2: 7 x 7(VQFN) | 48VQFN: 49 mm2: 7 x 7(VQFN) | 48VQFN: 49 mm2: 7 x 7(VQFN) | |
Package Size: mm2:W x L (PKG) | 48VQFN: 49 mm2: 7 x 7(VQFN) | |||
Power Consumption(Typ), mW | 220 | 220 | 220 | |
Power Consumption(Typ)(mW) | 220 | |||
Rating | Catalog | Catalog | Catalog | Catalog |
Reference Mode | Ext,Int | Ext,Int | Ext,Int | Ext Int |
Resolution, Bits | 18 | 18 | 18 | |
Resolution(Bits) | 18 | |||
SINAD, dB | 93 | 93 | 93 | |
SINAD(dB) | 93 | |||
SNR, dB | 94 | 94 | 94 | |
SNR(dB) | 94 | |||
Sample Rate (max), SPS | 1MSPS | 1MSPS | 1MSPS | |
Sample Rate (max)(SPS) | 1MSPS | |||
Sample Rate(Max), MSPS | 1 | 1 | 1 | |
THD(Typ), dB | -112 | -112 | -112 | |
THD(Typ)(dB) | -112 |
Öko-Plan
ADS8481IBRGZT | ADS8481IBRGZTG4 | ADS8481IRGZT | ADS8481RGZR | |
---|---|---|---|---|
RoHS | Compliant | Compliant | Compliant | Not Compliant |
Pb Free | No |
Anwendungshinweise
- Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Modellreihe
Serie: ADS8481 (4)
Herstellerklassifikation
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)