Datasheet Texas Instruments ADS8326 — Datenblatt

HerstellerTexas Instruments
SerieADS8326
Datasheet Texas Instruments ADS8326

16-Bit-Pseudo-Diff-Eingang, 250 kSPS serieller Ausgang, 2,7 V bis 5,5 V Micro Power Sampling ADC

Datenblätter

16-Bit, High-Speed, 2.7V to 5V, microPower Sampling Analog-to-Digital Converter datasheet
PDF, 1.3 Mb, Revision: C, Datei veröffentlicht: Sep 30, 2009
Auszug aus dem Dokument

Preise

Status

ADS8326IBDGKRADS8326IBDGKTADS8326IBDGKTG4ADS8326IBDRBRADS8326IBDRBTADS8326IDGKRADS8326IDGKRG4ADS8326IDGKTADS8326IDGKTG4ADS8326IDRBRADS8326IDRBT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoNoNoNoYesYesNoYesYesYes

Verpackung

ADS8326IBDGKRADS8326IBDGKTADS8326IBDGKTG4ADS8326IBDRBRADS8326IBDRBTADS8326IDGKRADS8326IDGKRG4ADS8326IDGKTADS8326IDGKTG4ADS8326IDRBRADS8326IDRBT
N1234567891011
Pin88888888888
Package TypeDGKDGKDGKDRBDRBDGKDGKDGKDGKDRBDRB
Industry STD TermVSSOPVSSOPVSSOPVSONVSONVSSOPVSSOPVSSOPVSSOPVSONVSON
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GS-PDSO-NS-PDSO-NR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GS-PDSO-NS-PDSO-N
Package QTY25002502503000250250025002502503000250
CarrierLARGE T&RSMALL T&RSMALL T&RLARGE T&RSMALL T&RLARGE T&RLARGE T&RSMALL T&RSMALL T&RLARGE T&RSMALL T&R
Device MarkingD26D26D26D26D26D26D26D26D26D26D26
Width (mm)33333333333
Length (mm)33333333333
Thickness (mm).97.97.97.88.88.97.97.97.97.88.88
Pitch (mm).65.65.65.65.65.65.65.65.65.65.65
Max Height (mm)1.071.071.07111.071.071.071.0711
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsADS8326IBDGKR
ADS8326IBDGKR
ADS8326IBDGKT
ADS8326IBDGKT
ADS8326IBDGKTG4
ADS8326IBDGKTG4
ADS8326IBDRBR
ADS8326IBDRBR
ADS8326IBDRBT
ADS8326IBDRBT
ADS8326IDGKR
ADS8326IDGKR
ADS8326IDGKRG4
ADS8326IDGKRG4
ADS8326IDGKT
ADS8326IDGKT
ADS8326IDGKTG4
ADS8326IDGKTG4
ADS8326IDRBR
ADS8326IDRBR
ADS8326IDRBT
ADS8326IDRBT
# Input Channels11111111111
Analog Voltage AVDD(Max), V5.55.55.55.55.55.55.55.55.55.55.5
Analog Voltage AVDD(Min), V2.72.72.72.72.72.72.72.72.72.72.7
ArchitectureSARSARSARSARSARSARSARSARSARSARSAR
Digital Supply(Max), V5.55.55.55.55.55.55.55.55.55.55.5
Digital Supply(Min), V2.72.72.72.72.72.72.72.72.72.72.7
INL(Max), +/-LSB1.51.51.51.51.51.51.51.51.51.51.5
Input Range(Max), V5.55.55.55.55.55.55.55.55.55.55.5
Input TypePseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-Ended
Integrated FeaturesN/AN/AN/AN/AN/AN/AN/AN/AN/AN/AN/A
InterfaceSerial,SPISerial,SPISerial,SPISerial,SPISerial,SPISerial,SPISerial,SPISerial,SPISerial,SPISerial,SPISerial,SPI
Multi-Channel ConfigurationN/AN/AN/AN/AN/AN/AN/AN/AN/AN/AN/A
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupVSSOPVSSOPVSSOPSONSONVSSOPVSSOPVSSOPVSSOPSONSON
Package Size: mm2:W x L, PKG8VSSOP: 15 mm2: 4.9 x 3(VSSOP)8VSSOP: 15 mm2: 4.9 x 3(VSSOP)8VSSOP: 15 mm2: 4.9 x 3(VSSOP)See datasheet (SON)See datasheet (SON)8VSSOP: 15 mm2: 4.9 x 3(VSSOP)8VSSOP: 15 mm2: 4.9 x 3(VSSOP)8VSSOP: 15 mm2: 4.9 x 3(VSSOP)8VSSOP: 15 mm2: 4.9 x 3(VSSOP)See datasheet (SON)See datasheet (SON)
Power Consumption(Typ), mW1010101010101010101010
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExtExtExtExtExtExtExtExtExtExtExt
Resolution, Bits1616161616161616161616
SINAD, dB9191919191919191919191
SNR, dB91.591.591.591.591.591.591.591.591.591.591.5
Sample Rate (max), SPS250kSPS250kSPS250kSPS250kSPS250kSPS250kSPS250kSPS250kSPS250kSPS250kSPS250kSPS
Sample Rate(Max), MSPS0.250.250.250.250.250.250.250.250.250.250.25
THD(Typ), dB-99-99-99-99-99-99-99-99-99-99-99

Öko-Plan

ADS8326IBDGKRADS8326IBDGKTADS8326IBDGKTG4ADS8326IBDRBRADS8326IBDRBTADS8326IDGKRADS8326IDGKRG4ADS8326IDGKTADS8326IDGKTG4ADS8326IDRBRADS8326IDRBT
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Anwendungshinweise

  • The IBIS model, Part 3: Using IBIS models to investigate signal-integrity issues
    PDF, 265 Kb, Datei veröffentlicht: Jun 17, 2011
  • 2Q 2011 Issue Analog Applications Journal
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  • Interfacing the MSOP8EVM to TMS470 Processors
    PDF, 68 Kb, Datei veröffentlicht: Mar 15, 2006
    This application report presents a method for interfacing the modular MSOP8EVM, an evaluation module (EVM) for single-channel, low-power, 8- to 16-bit serial analog-to-digital converters to the TMS470 series microcontrollers. The hardware used for this example includes the TMS470 Kickstart Development Kit evaluation kit featuring the 60-MHz TMS470R1B1M and the HPA-MCU Interface Board. The soft
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015

Modellreihe

Herstellerklassifikation

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)