Datasheet Texas Instruments ADS7886 — Datenblatt

HerstellerTexas Instruments
SerieADS7886
Datasheet Texas Instruments ADS7886

2,35 V - 5,25 V, 12 Bit, 1 MSPS, serieller ADC

Datenblätter

ADS7886 12-Bit, 1-MSPS, Micro-Power, Miniature SAR Analog-to-Digital Converters datasheet
PDF, 1.5 Mb, Revision: B, Datei veröffentlicht: Aug 31, 2016
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Preise

Status

ADS7886SBDBVRADS7886SBDBVTADS7886SBDCKRADS7886SBDCKTADS7886SDBVRADS7886SDBVTADS7886SDCKRADS7886SDCKT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesYesYesNoNoNoNo

Verpackung

ADS7886SBDBVRADS7886SBDBVTADS7886SBDCKRADS7886SBDCKTADS7886SDBVRADS7886SDBVTADS7886SDCKRADS7886SDCKT
N12345678
Pin66666666
Package TypeDBVDBVDCKDCKDBVDBVDCKDCK
Industry STD TermSOT-23SOT-23SOT-SC70SOT-SC70SOT-23SOT-23SOT-SC70SOT-SC70
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY3000250300025030002503000250
CarrierLARGE T&RSMALL T&RLARGE T&RSMALL T&RLARGE T&RSMALL T&RLARGE T&RSMALL T&R
Device MarkingBBAQBBAQBNLBNLBBAQBBAQBNLBNL
Width (mm)1.61.61.251.251.61.61.251.25
Length (mm)2.92.9222.92.922
Thickness (mm)1.21.2.9.91.21.2.9.9
Pitch (mm).95.95.65.65.95.95.65.65
Max Height (mm)1.451.451.11.11.451.451.11.1
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsADS7886SBDBVR
ADS7886SBDBVR
ADS7886SBDBVT
ADS7886SBDBVT
ADS7886SBDCKR
ADS7886SBDCKR
ADS7886SBDCKT
ADS7886SBDCKT
ADS7886SDBVR
ADS7886SDBVR
ADS7886SDBVT
ADS7886SDBVT
ADS7886SDCKR
ADS7886SDCKR
ADS7886SDCKT
ADS7886SDCKT
# Input Channels11111111
Analog Voltage AVDD(Max), V5.255.255.255.255.255.255.255.25
Analog Voltage AVDD(Min), V2.352.352.352.352.352.352.352.35
ArchitectureSARSARSARSARSARSARSARSAR
Digital Supply(Max), V5.255.255.255.255.255.255.255.25
Digital Supply(Min), V2.352.352.352.352.352.352.352.35
INL(Max), +/-LSB1.251.251.251.251.251.251.251.25
Input Range(Max), V5.255.255.255.255.255.255.255.25
Input TypeSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-Ended
Integrated FeaturesN/AN/AN/AN/AN/AN/AN/AN/A
InterfaceSPISPISPISPISPISPISPISPI
Multi-Channel ConfigurationN/AN/AN/AN/AN/AN/AN/AN/A
Operating Temperature Range, C-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125
Package GroupSOT-23SOT-23SC70SC70SOT-23SOT-23SC70SC70
Package Size: mm2:W x L, PKG6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)6SC70: 4 mm2: 2.1 x 2(SC70)6SC70: 4 mm2: 2.1 x 2(SC70)6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)6SC70: 4 mm2: 2.1 x 2(SC70)6SC70: 4 mm2: 2.1 x 2(SC70)
Power Consumption(Typ), mW13.513.513.513.513.513.513.513.5
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeSupplySupplySupplySupplySupplySupplySupplySupply
Resolution, Bits1212121212121212
SINAD, dB72.2572.2572.2572.2572.2572.2572.2572.25
SNR, dB72.2572.2572.2572.2572.2572.2572.2572.25
Sample Rate (max), SPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS
Sample Rate(Max), MSPS11111111
THD(Typ), dB-84-84-84-84-84-84-84-84

Öko-Plan

ADS7886SBDBVRADS7886SBDBVTADS7886SBDCKRADS7886SBDCKTADS7886SDBVRADS7886SDBVTADS7886SDCKRADS7886SDCKT
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYesYesYesYesYesYesYes

Anwendungshinweise

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015

Modellreihe

Herstellerklassifikation

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)