Datasheet Texas Instruments ADS7861 — Datenblatt

HerstellerTexas Instruments
SerieADS7861
Datasheet Texas Instruments ADS7861

Dualer Analog-Digital-Wandler mit 500 kHz, 12 Bit, 2 + 2 Kanal und gleichzeitiger Abtastung

Datenblätter

Dual, 500kSPS,12-Bit, 2+2 Channel Simultaneous Sampling Analog/Digital Converter datasheet
PDF, 1.4 Mb, Revision: D, Datei veröffentlicht: Aug 14, 2007
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Preise

Status

ADS7861EADS7861E/2K5ADS7861E/2K5G4ADS7861EBADS7861EB/2K5ADS7861EB/2K5G4ADS7861EBG4ADS7861EG4ADS7861IBRHBTADS7861IRHBTADS7861IRHBTG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoNoYesYesNoYesNoNoYesYes

Verpackung

ADS7861EADS7861E/2K5ADS7861E/2K5G4ADS7861EBADS7861EB/2K5ADS7861EB/2K5G4ADS7861EBG4ADS7861EG4ADS7861IBRHBTADS7861IRHBTADS7861IRHBTG4
N1234567891011
Pin2424242424242424323232
Package TypeDBQDBQDBQDBQDBQDBQDBQDBQRHBRHBRHB
Industry STD TermSSOPSSOPSSOPSSOPSSOPSSOPSSOPSSOPVQFNVQFNVQFN
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY502500250050250025005050250250250
CarrierTUBELARGE T&RLARGE T&RTUBELARGE T&RLARGE T&RTUBETUBESMALL T&RSMALL T&RSMALL T&R
Device MarkingADS7861EADS7861EADS7861EBBBADS7861EADS7861EADSADS7861I
Width (mm)3.93.93.93.93.93.93.93.9555
Length (mm)8.658.658.658.658.658.658.658.65555
Thickness (mm)1.51.51.51.51.51.51.51.5.9.9.9
Pitch (mm).64.64.64.64.64.64.64.64.5.5.5
Max Height (mm)1.751.751.751.751.751.751.751.75111
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Parameter

Parameters / ModelsADS7861E
ADS7861E
ADS7861E/2K5
ADS7861E/2K5
ADS7861E/2K5G4
ADS7861E/2K5G4
ADS7861EB
ADS7861EB
ADS7861EB/2K5
ADS7861EB/2K5
ADS7861EB/2K5G4
ADS7861EB/2K5G4
ADS7861EBG4
ADS7861EBG4
ADS7861EG4
ADS7861EG4
ADS7861IBRHBT
ADS7861IBRHBT
ADS7861IRHBT
ADS7861IRHBT
ADS7861IRHBTG4
ADS7861IRHBTG4
# Input Channels44444444444
Analog Voltage AVDD(Max), V5.255.255.255.255.255.255.255.255.255.255.25
Analog Voltage AVDD(Min), V4.754.754.754.754.754.754.754.754.754.754.75
ArchitectureSARSARSARSARSARSARSARSARSARSARSAR
Digital Supply(Max), V5.255.255.255.255.255.255.255.255.255.255.25
Digital Supply(Min), V4.754.754.754.754.754.754.754.754.754.754.75
INL(Max), +/-LSB11111111111
Input Range(Max), V5.255.255.255.255.255.255.255.255.255.255.25
Input TypeDifferentialDifferentialDifferentialDifferentialDifferentialDifferentialDifferentialDifferentialDifferentialDifferentialDifferential
Integrated FeaturesN/AN/AN/AN/AN/AN/AN/AN/AN/AN/AN/A
InterfaceSerialSerialSerialSerialSerialSerialSerialSerialSerialSerialSerial
Multi-Channel ConfigurationSimultaneous SamplingSimultaneous SamplingSimultaneous SamplingSimultaneous SamplingSimultaneous SamplingSimultaneous SamplingSimultaneous SamplingSimultaneous SamplingSimultaneous SamplingSimultaneous SamplingSimultaneous Sampling
Operating Temperature Range, C-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125-40 to 125
Package GroupSSOPSSOPSSOPSSOPSSOPSSOPSSOPSSOPVQFNVQFNVQFN
Package Size: mm2:W x L, PKG24SSOP: 52 mm2: 6 x 8.65(SSOP)24SSOP: 52 mm2: 6 x 8.65(SSOP)24SSOP: 52 mm2: 6 x 8.65(SSOP)24SSOP: 52 mm2: 6 x 8.65(SSOP)24SSOP: 52 mm2: 6 x 8.65(SSOP)24SSOP: 52 mm2: 6 x 8.65(SSOP)24SSOP: 52 mm2: 6 x 8.65(SSOP)24SSOP: 52 mm2: 6 x 8.65(SSOP)32VQFN: 25 mm2: 5 x 5(VQFN)32VQFN: 25 mm2: 5 x 5(VQFN)32VQFN: 25 mm2: 5 x 5(VQFN)
Power Consumption(Typ), mW2525252525252525252525
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExt,IntExt,IntExt,IntExt,IntExt,IntExt,IntExt,IntExt,IntExt,IntExt,IntExt,Int
Resolution, Bits1212121212121212121212
SINAD, dB7070707070707070707070
Sample Rate (max), SPS500kSPS500kSPS500kSPS500kSPS500kSPS500kSPS500kSPS500kSPS500kSPS500kSPS500kSPS
Sample Rate(Max), MSPS0.50.50.50.50.50.50.50.50.50.50.5
THD(Typ), dB-76-76-76-76-76-76-76-76-76-76-76

Öko-Plan

ADS7861EADS7861E/2K5ADS7861E/2K5G4ADS7861EBADS7861EB/2K5ADS7861EB/2K5G4ADS7861EBG4ADS7861EG4ADS7861IBRHBTADS7861IRHBTADS7861IRHBTG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Anwendungshinweise

  • Interfacing the ADS786x to TMS470 Processors
    PDF, 59 Kb, Datei veröffentlicht: Jul 10, 2006
    This application report presents methods of interfacing the ADS7866/67/68 12/10/8-bit SAR analog-to-digital converter to the serial peripheral interface (SPI) port of the TMS470 processors. The flexible clocking scheme of the TMS470 SPI port, along with its internal 16-bit shift register provides an easy hardware/software interface to this series of high-speed, micro power SAR converters.
  • Interfacing the ADS786x to the MSP430F2013
    PDF, 90 Kb, Datei veröffentlicht: Jun 15, 2006
    This application report presents methods of interfacing the ADS7866/67/68 12/10/8-bit SAR analog-to-digital converter to the MSP430F2013 universal serial interface (USI) in SPI mode. The flexible clocking scheme of the USI port, along with the internal 16-bit shift register, provides an easy hardware/software interface to this series of high-speed, micro-power SAR converters.
  • Using a SAR A/D Converter for Current Measurement in Motor Control Applications (Rev. A)
    PDF, 405 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015

Modellreihe

Herstellerklassifikation

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)