Datasheet Texas Instruments ADS7824 — Datenblatt
Hersteller | Texas Instruments |
Serie | ADS7824 |
4-Kanal-CMOS-A / D-Wandler mit 12-Bit-Abtastung
Datenblätter
4-Channel, 12-Bit Sampling CMOS A/D Converter datasheet
PDF, 800 Kb, Datei veröffentlicht: Sep 27, 2000
Auszug aus dem Dokument
Preise
Status
ADS7824U | ADS7824U/1K | ADS7824UB | ADS7824UBE4 | |
---|---|---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | No | No | No |
Verpackung
ADS7824U | ADS7824U/1K | ADS7824UB | ADS7824UBE4 | |
---|---|---|---|---|
N | 1 | 2 | 3 | 4 |
Pin | 28 | 28 | 28 | 28 |
Package Type | DW | DW | DW | DW |
Industry STD Term | SOIC | SOIC | SOIC | SOIC |
JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
Package QTY | 20 | 1000 | 20 | 20 |
Carrier | TUBE | LARGE T&R | TUBE | TUBE |
Device Marking | ADS7824U | ADS7824U | B | B |
Width (mm) | 7.5 | 7.5 | 7.5 | 7.5 |
Length (mm) | 17.9 | 17.9 | 17.9 | 17.9 |
Thickness (mm) | 2.35 | 2.35 | 2.35 | 2.35 |
Pitch (mm) | 1.27 | 1.27 | 1.27 | 1.27 |
Max Height (mm) | 2.65 | 2.65 | 2.65 | 2.65 |
Mechanical Data | Herunterladen | Herunterladen | Herunterladen | Herunterladen |
Parameter
Parameters / Models | ADS7824U | ADS7824U/1K | ADS7824UB | ADS7824UBE4 |
---|---|---|---|---|
# Input Channels | 4 | 4 | 4 | 4 |
Analog Voltage AVDD(Max), V | 5.25 | 5.25 | 5.25 | 5.25 |
Analog Voltage AVDD(Min), V | 4.75 | 4.75 | 4.75 | 4.75 |
Architecture | SAR | SAR | SAR | SAR |
Digital Supply(Max), V | 5.25 | 5.25 | 5.25 | 5.25 |
Digital Supply(Min), V | 4.75 | 4.75 | 4.75 | 4.75 |
INL(Max), +/-LSB | 0.5 | 0.5 | 0.5 | 0.5 |
Input Range(Max), V | 10 | 10 | 10 | 10 |
Input Range(Min), V | -10 | -10 | -10 | -10 |
Input Type | Single-Ended | Single-Ended | Single-Ended | Single-Ended |
Integrated Features | N/A | N/A | N/A | N/A |
Interface | Parallel,Serial | Parallel,Serial | Parallel,Serial | Parallel,Serial |
Multi-Channel Configuration | Multiplexed | Multiplexed | Multiplexed | Multiplexed |
Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
Package Group | SOIC | SOIC | SOIC | SOIC |
Package Size: mm2:W x L, PKG | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) |
Power Consumption(Typ), mW | 50 | 50 | 50 | 50 |
Rating | Catalog | Catalog | Catalog | Catalog |
Reference Mode | Ext,Int | Ext,Int | Ext,Int | Ext,Int |
Resolution, Bits | 12 | 12 | 12 | 12 |
SINAD, dB | N/A | N/A | N/A | N/A |
SNR, dB | 73 | 73 | 73 | 73 |
Sample Rate (max), SPS | 40kSPS | 40kSPS | 40kSPS | 40kSPS |
Sample Rate(Max), MSPS | 0.04 | 0.04 | 0.04 | 0.04 |
THD(Typ), dB | -90 | -90 | -90 | -90 |
Öko-Plan
ADS7824U | ADS7824U/1K | ADS7824UB | ADS7824UBE4 | |
---|---|---|---|---|
RoHS | Compliant | Compliant | Compliant | Compliant |
Anwendungshinweise
- Using the Continuos Parallel Mode with the ADS7824 and ADS7825PDF, 57 Kb, Datei veröffentlicht: Sep 27, 2000
The ADS7824 and ADS7825 are 12-bit and 16-bit converters that have a four channel multiplexed front end. The channel selection on the analog input of these converters is programmable by way of the pins on the devices, A0 and A1. This feature provides the most flexibility by allowing the user to change to the preferred input channel on the fly. Additionally, the input channels can be cycled by util - ADS7809 Tag FeaturesPDF, 50 Kb, Datei veröffentlicht: Sep 27, 2000
The ADS7809 is part of a family of capacitive redistribution SAR A/D converters that feature a serial output and a tag pin for cascading multiple converters. Other members of this family include the ADS7806, ADS7807, ADS7808, ADS7824, and ADS7825. Note that the even numbered converters are 12-bit converters and the odd numbered converters are 16-bit converters. - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to - Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015
Modellreihe
Serie: ADS7824 (4)
Herstellerklassifikation
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)