Datasheet Texas Instruments ADS7223 — Datenblatt

Hersteller	Texas Instruments
Serie	ADS7223

Datenblätter

Preise

Status

Verpackung

Parameter

Parameters / Models	ADS7223SRHBR	ADS7223SRHBT
# Input Channels	4	4
Analog Voltage AVDD(Max), V	5.5	5.5
Analog Voltage AVDD(Min), V	2.7	2.7
Architecture	SAR	SAR
Digital Supply(Max), V	5.5	5.5
Digital Supply(Min), V	2.3	2.3
INL(Max), +/-LSB	0.5	0.5
Input Range(Max), V	5.5	5.5
Input Type	Differential,Pseudo-Differential	Differential,Pseudo-Differential
Integrated Features	N/A	N/A
Interface	SPI	SPI
Multi-Channel Configuration	Multiplexed,Simultaneous Sampling	Multiplexed,Simultaneous Sampling
Operating Temperature Range, C	-40 to 125	-40 to 125
Package Group	VQFN	VQFN
Package Size: mm2:W x L, PKG	32VQFN: 25 mm2: 5 x 5(VQFN)	32VQFN: 25 mm2: 5 x 5(VQFN)
Power Consumption(Typ), mW	47.2	47.2
Rating	Catalog	Catalog
Reference Mode	Ext,Int	Ext,Int
Resolution, Bits	12	12
SINAD, dB	72	72
SNR, dB	73	73
Sample Rate (max), SPS	1MSPS	1MSPS
Sample Rate(Max), MSPS	1	1
THD(Typ), dB	-86	-86

Öko-Plan

Anwendungshinweise

• Herunterladen
  Using the Sequencer and Pseudo-Differential Features of the ADS8363
  PDF, 161 Kb, Datei veröffentlicht: May 21, 2014
• Herunterladen
  Interfacing to the ADS8363 Pseudo-Differential Operating Mode
  PDF, 548 Kb, Datei veröffentlicht: Aug 4, 2014
• Herunterladen
  Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
  PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
  This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
• Herunterladen
  Determining Minimum Acquisition Times for SAR ADCs, part 2
  PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
  The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
• Herunterladen
  Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
  PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
• Herunterladen
  A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
  PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
  This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
• Herunterladen
  Principles of Data Acquisition and Conversion (Rev. A)
  PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015

Modellreihe

Herstellerklassifikation

• Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)