Datasheet Texas Instruments ADS54T02 — Datenblatt
Hersteller | Texas Instruments |
Serie | ADS54T02 |
2-Kanal 750MSPS BTS Feedback- und Empfänger-IC
Datenblätter
Dual Channel 12-Bit 750Msps Receiver and Feedback IC, ADS54T02 datasheet
PDF, 1.5 Mb, Revision: B, Datei veröffentlicht: Jan 8, 2014
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Preise
Status
ADS54T02IZAY | ADS54T02IZAYR | |
---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes | No |
Verpackung
ADS54T02IZAY | ADS54T02IZAYR | |
---|---|---|
N | 1 | 2 |
Pin | 196 | 196 |
Package Type | ZAY | ZAY |
Industry STD Term | NFBGA | NFBGA |
JEDEC Code | S-PBGA-N | S-PBGA-N |
Package QTY | 160 | 1000 |
Carrier | JEDEC TRAY (5+1) | LARGE T&R |
Device Marking | ADS54T02I | ADS54T02I |
Width (mm) | 12 | 12 |
Length (mm) | 12 | 12 |
Thickness (mm) | .9 | .9 |
Pitch (mm) | .8 | .8 |
Max Height (mm) | 1.4 | 1.4 |
Mechanical Data | Herunterladen | Herunterladen |
Parameter
Parameters / Models | ADS54T02IZAY | ADS54T02IZAYR |
---|---|---|
# Input Channels | 2 | 2 |
Analog Input BW, MHz | 1200 | 1200 |
Analog Voltage AVDD(Max), V | 3.45 | 3.45 |
Analog Voltage AVDD(Min), V | 3.15 | 3.15 |
Interface | DDR LVDS | DDR LVDS |
Logic Voltage DV/DD(Max), V | 1.9 | 1.9 |
Logic Voltage DV/DD(Min), V | 1.7 | 1.7 |
Operating Temperature Range, C | -40 to 85 | -40 to 85 |
Package Group | NFBGA | NFBGA |
Package Size: mm2:W x L, PKG | 196NFBGA: 144 mm2: 12 x 12(NFBGA) | 196NFBGA: 144 mm2: 12 x 12(NFBGA) |
Power Consumption(Typ), mW | 2100 | 2100 |
Resolution, Bits | 12 | 12 |
SFDR(Typ), dB | 74 | 74 |
SNR(Typ), dB | 60.9 | 60.9 |
Sample Rate(Max), MSPS | 750 | 750 |
Special Features | Decimating Filter,Differential Inputs,Nap Mode,Out of Range Indicator,Power Down | Decimating Filter,Differential Inputs,Nap Mode,Out of Range Indicator,Power Down |
Öko-Plan
ADS54T02IZAY | ADS54T02IZAYR | |
---|---|---|
RoHS | Compliant | Compliant |
Anwendungshinweise
- Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)PDF, 1.2 Mb, Revision: A, Datei veröffentlicht: Jul 19, 2013
- Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)PDF, 2.0 Mb, Revision: A, Datei veröffentlicht: May 22, 2015
- Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015
Modellreihe
Serie: ADS54T02 (2)
Herstellerklassifikation
- Semiconductors> RF & Microwave> Wideband Receivers