Datasheet Texas Instruments ADC08D1520 — Datenblatt
Hersteller | Texas Instruments |
Serie | ADC08D1520 |
8-Bit-, Dual-1,5-GSPS- oder Single-3,0-GSPS-Analog-Digital-Wandler (ADC)
Datenblätter
ADC08D1520 Low Power, 8-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter datasheet
PDF, 886 Kb, Revision: D, Datei veröffentlicht: Mar 14, 2013
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Preise
Status
ADC08D1520CIYB | ADC08D1520CIYB/NOPB | |
---|---|---|
Lifecycle Status | NRND (Not recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | No |
Verpackung
ADC08D1520CIYB | ADC08D1520CIYB/NOPB | |
---|---|---|
N | 1 | 2 |
Pin | 128 | 128 |
Package Type | NNB | NNB |
Industry STD Term | HLQFP | HLQFP |
JEDEC Code | S-PQFP-N | S-PQFP-N |
Package QTY | 60 | 60 |
Carrier | JEDEC TRAY (10+1) | JEDEC TRAY (10+1) |
Device Marking | CIYB | ADC08D1520 |
Width (mm) | 20 | 20 |
Length (mm) | 20 | 20 |
Thickness (mm) | 1.4 | 1.4 |
Pitch (mm) | .5 | .5 |
Max Height (mm) | 1.6 | 1.6 |
Mechanical Data | Herunterladen | Herunterladen |
Parameter
Parameters / Models | ADC08D1520CIYB | ADC08D1520CIYB/NOPB |
---|---|---|
# Input Channels | 2,1 | 2,1 |
Analog Input BW, MHz | 2000 | 2000 |
Architecture | Folding Interpolating | Folding Interpolating |
DNL(Max), +/-LSB | 0.15 | 0.15 |
DNL(Typ), +/-LSB | 0.15 | 0.15 |
ENOB, Bits | 7.4 | 7.4 |
INL(Max), +/-LSB | 0.3 | 0.3 |
INL(Typ), +/-LSB | 0.3 | 0.3 |
Input Buffer | Yes | Yes |
Input Range, Vp-p | 0.87 | 0.87 |
Interface | Parallel LVDS | Parallel LVDS |
Operating Temperature Range, C | -40 to 85 | -40 to 85 |
Package Group | HLQFP | HLQFP |
Package Size: mm2:W x L, PKG | 128HLQFP: 484 mm2: 22 x 22(HLQFP) | 128HLQFP: 484 mm2: 22 x 22(HLQFP) |
Power Consumption(Typ), mW | 2000 | 2000 |
Rating | Catalog | Catalog |
Reference Mode | Int | Int |
Resolution, Bits | 8 | 8 |
SFDR, dB | 58 | 58 |
SINAD, dB | 46.5 | 46.5 |
SNR, dB | 46.8 | 46.8 |
Sample Rate(Max), MSPS | 1500,3000 | 1500,3000 |
Öko-Plan
ADC08D1520CIYB | ADC08D1520CIYB/NOPB | |
---|---|---|
RoHS | See ti.com | Compliant |
Anwendungshinweise
- AN-1558 Clocking High-Speed A/D Converters (Rev. B)PDF, 1.2 Mb, Revision: B, Datei veröffentlicht: May 1, 2013
Extremely high-speed ADCs (>1 GSPS) demand a low-jitter sample clock in order to preserve signal-tonoiseratio (SNR). These 8- and 10-bit converters have best-case noise floors set by quantization noise.For an N-bit ADC sampling a full-scale sinusoid, the well known expression for SNR (in dB) is: SNR =6.02N + 1.76. This sets the best case noise floor for an 8-bit ADC at в€’49.9 dBc. The noise f
Modellreihe
Serie: ADC08D1520 (2)
Herstellerklassifikation
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)