Datasheet Texas Instruments 74AC16373DLRG4 — Datenblatt
Hersteller | Texas Instruments |
Serie | 74AC16373 |
Artikelnummer | 74AC16373DLRG4 |
Transparente 16-Bit-D-Latches mit 3-Zustands-Ausgängen 48-SSOP -40 bis 85
Datenblätter
16-Bit Transparent D-Type Latches With 3-State Outputs datasheet
PDF, 351 Kb, Revision: B, Datei veröffentlicht: Apr 1, 1996
Auszug aus dem Dokument
Preise
Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Verpackung
Pin | 48 |
Package Type | DL |
Industry STD Term | SSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 1000 |
Carrier | LARGE T&R |
Device Marking | AC16373 |
Width (mm) | 7.49 |
Length (mm) | 15.88 |
Thickness (mm) | 2.59 |
Pitch (mm) | .635 |
Max Height (mm) | 2.79 |
Mechanical Data | Herunterladen |
Parameter
3-State Output | Yes |
Bits | 16 |
F @ Nom Voltage(Max) | 100 Mhz |
ICC @ Nom Voltage(Max) | 0.08 mA |
Operating Temperature Range | -40 to 85 C |
Output Drive (IOL/IOH)(Max) | 24/-24 mA |
Package Group | SSOP |
Package Size: mm2:W x L | 48SSOP: 164 mm2: 10.35 x 15.88(SSOP) PKG |
Rating | Catalog |
Schmitt Trigger | No |
Technology Family | AC |
VCC(Max) | 5.5 V |
VCC(Min) | 3 V |
Voltage(Nom) | 3.3,5 V |
tpd @ Nom Voltage(Max) | 14.8,10.1 ns |
Öko-Plan
RoHS | Compliant |
Anwendungshinweise
- TI IBIS File Creation Validation and Distribution ProcessesPDF, 380 Kb, Datei veröffentlicht: Aug 29, 2002
The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con - Semiconductor Packing Material Electrostatic Discharge (ESD) ProtectionPDF, 337 Kb, Datei veröffentlicht: Jul 8, 2004
Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge - Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)PDF, 614 Kb, Revision: C, Datei veröffentlicht: Dec 2, 2015
- Introduction to LogicPDF, 93 Kb, Datei veröffentlicht: Apr 30, 2015
- Implications of Slow or Floating CMOS Inputs (Rev. D)PDF, 260 Kb, Revision: D, Datei veröffentlicht: Jun 23, 2016
- Live InsertionPDF, 150 Kb, Datei veröffentlicht: Oct 1, 1996
Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha - CMOS Power Consumption and CPD Calculation (Rev. B)PDF, 89 Kb, Revision: B, Datei veröffentlicht: Jun 1, 1997
Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale - Input and Output Characteristics of Digital Integrated CircuitsPDF, 1.7 Mb, Datei veröffentlicht: Oct 1, 1996
This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou - Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, Datei veröffentlicht: Feb 6, 2015
- Designing With Logic (Rev. C)PDF, 186 Kb, Revision: C, Datei veröffentlicht: Jun 1, 1997
Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w - Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, Datei veröffentlicht: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
Modellreihe
Serie: 74AC16373 (4)
- 74AC16373DL 74AC16373DLG4 74AC16373DLR 74AC16373DLRG4
Herstellerklassifikation
- Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Latch