Datasheet Texas Instruments ADS8568SRGCR — Datenblatt
| Hersteller | Texas Instruments |
| Serie | ADS8568 |
| Artikelnummer | ADS8568SRGCR |
16-Bit-8-Kanal-SAR-ADC 64-VQFN -40 bis 125 mit simultaner Abtastung und bipolarem Eingang
Datenblätter
ADS85x8 12-, 14-, and 16-Bit, 8-Channel, Simultaneous Sampling ADCs datasheet
PDF, 1.5 Mb, Revision: C, Datei veröffentlicht: Feb 3, 2016
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Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 64 |
| Package Type | RGC |
| Industry STD Term | VQFN |
| JEDEC Code | S-PQFP-N |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | ADS8568 |
| Width (mm) | 9 |
| Length (mm) | 9 |
| Thickness (mm) | .88 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1 |
| Mechanical Data | Herunterladen |
Parameter
| # Input Channels | 8 |
| Analog Voltage AVDD(Max) | 5.5 V |
| Analog Voltage AVDD(Min) | 4.5 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.5 V |
| Digital Supply(Min) | 2.7 V |
| INL(Max) | 3 +/-LSB |
| Input Range(Max) | 12 V |
| Input Range(Min) | -12 V |
| Input Type | Single-Ended |
| Integrated Features | Daisy-Chainable,Oscillator |
| Interface | Parallel,SPI |
| Multi-Channel Configuration | Simultaneous Sampling |
| Operating Temperature Range | -40 to 125 C |
| Package Group | VQFN |
| Package Size: mm2:W x L | 64VQFN: 81 mm2: 9 x 9(VQFN) PKG |
| Power Consumption(Typ) | 335 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Resolution | 16 Bits |
| SINAD | 90 dB |
| SNR | 91.5 dB |
| Sample Rate (max) | 500kSPS SPS |
| Sample Rate(Max) | 0.5 MSPS |
| THD(Typ) | -94 dB |
Öko-Plan
| RoHS | Compliant |
Design Kits und Evaluierungsmodule
- Evaluation Modules & Boards: ADS8568EVM-PDK
ADS8568 Performance Demonstration Kit
Lifecycle Status: Active (Recommended for new designs)
Anwendungshinweise
- ADS856x Design Challenges and Improvement Techniques for SAR Driver Circuit (Rev. A)PDF, 11.5 Mb, Revision: A, Datei veröffentlicht: May 18, 2015
- ADS8528, ADS8548, and ADS8568 Timing ConsiderationsPDF, 108 Kb, Datei veröffentlicht: Jun 21, 2014
- Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Modellreihe
Serie: ADS8568 (4)
- ADS8568SPM ADS8568SPMR ADS8568SRGCR ADS8568SRGCT
Herstellerklassifikation
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)