Datasheet Texas Instruments ADS5521IPAPRG4 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | ADS5521 |
| Artikelnummer | ADS5521IPAPRG4 |
12-Bit, 105-MSPS-Analog-Digital-Wandler (ADC) 64-HTQFP -40 bis 85
Datenblätter
12-Bit, 105MSPS Analog-to-Digital Converter datasheet
PDF, 689 Kb, Revision: D, Datei veröffentlicht: Oct 30, 2008
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Preise
Status
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 64 |
| Package Type | PAP |
| Industry STD Term | HTQFP |
| JEDEC Code | S-PQFP-G |
| Width (mm) | 10 |
| Length (mm) | 10 |
| Thickness (mm) | 1 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Herunterladen |
Parameter
| # Input Channels | 1 |
| Analog Input BW(MHz) | 750 |
| Approx. Price (US$) | 36.79 | 1ku |
| Architecture | Pipeline |
| DNL(Max)(+/-LSB) | 0.25 |
| ENOB(Bits) | 11.3 |
| INL(Max)(+/-LSB) | 0.5 |
| Input Buffer | No |
| Input Range | 2.3V (p-p) |
| Interface | Parallel CMOS Serial SPI Interface |
| Operating Temperature Range(C) | -40 to 85 |
| Package Group | HTQFP |
| Package Size: mm2:W x L (PKG) | 64HTQFP: 144 mm2: 12 x 12(HTQFP) |
| Power Consumption(Typ)(mW) | 736 |
| Rating | Catalog |
| Reference Mode | Int |
| Resolution(Bits) | 12 |
| SFDR(dB) | 86 |
| SINAD(dB) | 70 |
| SNR(dB) | 70.5 |
| Sample Rate(Max)(MSPS) | 105 |
Öko-Plan
| RoHS | Not Compliant |
| Pb Free | No |
Design Kits und Evaluierungsmodule
- Evaluation Modules & Boards: TSW2200EVM
TSW2200EVM: Low Cost Portable Power Supply
Lifecycle Status: Active (Recommended for new designs)
Anwendungshinweise
- Clocking High-Speed Data ConvertersPDF, 310 Kb, Datei veröffentlicht: Jan 18, 2005
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Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers - Interleaving Analog-to-Digital ConvertersPDF, 64 Kb, Datei veröffentlicht: Oct 2, 2000
It is tempting when pushing the limits of analog-to-digital conversion to consider interleaving two or more converters to increase the sample rate. However, such designs must take into consideration several possible sources of error. - A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015
- Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
- What Designers Should Know About Data Converter DriftPDF, 95 Kb, Datei veröffentlicht: Oct 2, 2000
Exactly how inaccurate will a change in temperature make an analog-to-digital or digital-to-analog converter? As designers are well aware, a 12-bit device may provide a much lower accuracy at its operating-temperature extremes, perhaps only to 9 or even 8 bits. But for lack of more precise knowledge, many play it safe (and expensive) and overspecify.
Modellreihe
Serie: ADS5521 (3)
- ADS5521IPAP ADS5521IPAPR ADS5521IPAPRG4
Herstellerklassifikation
- Semiconductors > Data Converters > Analog to Digital Converter > High Speed ADC (>10MSPS)