Datasheet Texas Instruments SN74AS109DR — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SN74AS109 |
| Artikelnummer | SN74AS109DR |
Dual JK Positive-Edge-Triggered Flip-Flops mit klarem und voreingestelltem 16-SOIC 0 bis 70
Datenblätter
Preise
Status
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 16 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Width (mm) | 3.91 |
| Length (mm) | 9.9 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Herunterladen |
Öko-Plan
| RoHS | Not Compliant |
| Pb Free | No |
Modellreihe
Serie: SN74AS109 (2)
- SN74AS109D SN74AS109DR
Herstellerklassifikation
- Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop