Datasheet Texas Instruments CD74HC597NSR — Datenblatt
| Hersteller | Texas Instruments |
| Serie | CD74HC597 |
| Artikelnummer | CD74HC597NSR |
Hochgeschwindigkeits-CMOS-Logik-8-Bit-Schieberegister mit Eingangsspeicher 16-SO -55 bis 125
Datenblätter
CD54HC597, CD74HC597, CD74HCT597 datasheet
PDF, 679 Kb, Revision: C, Datei veröffentlicht: Oct 16, 2003
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Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 16 |
| Package Type | NS |
| Industry STD Term | SOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | HC597M |
| Width (mm) | 5.3 |
| Length (mm) | 10.3 |
| Thickness (mm) | 1.95 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 2 |
| Mechanical Data | Herunterladen |
Parameter
| 3-State Output | No |
| F @ Nom Voltage(Max) | 28 Mhz |
| ICC @ Nom Voltage(Max) | 0.08 mA |
| Operating Temperature Range | -55 to 125 C |
| Output Drive (IOL/IOH)(Max) | 5.2/-5.2 mA |
| Package Group | SO |
| Package Size: mm2:W x L | 16SO: 80 mm2: 7.8 x 10.2(SO) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | HC |
| VCC(Max) | 6 V |
| VCC(Min) | 2 V |
| Voltage(Nom) | 6 V |
| tpd @ Nom Voltage(Max) | 37 ns |
Öko-Plan
| RoHS | Compliant |
Anwendungshinweise
- Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, Datei veröffentlicht: Feb 6, 2015
- SN54/74HCT CMOS Logic Family Applications and RestrictionsPDF, 102 Kb, Datei veröffentlicht: May 1, 1996
The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal
Modellreihe
Serie: CD74HC597 (9)
Herstellerklassifikation
- Semiconductors > Logic > Flip-Flop/Latch/Register > Shift Register