Datasheet Texas Instruments SN74AVC1T45YZPR — Datenblatt

HerstellerTexas Instruments
SerieSN74AVC1T45
ArtikelnummerSN74AVC1T45YZPR
Datasheet Texas Instruments SN74AVC1T45YZPR

Single-Bit-Dual-Supply-Bus-Transceiver mit konfigurierbarer Spannungspegelverschiebung und 3-Zustands-Ausgängen 6-DSBGA -40 bis 85

Datenblätter

SN74AVC1T45 Single-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs datasheet
PDF, 1.2 Mb, Revision: H, Datei veröffentlicht: Dec 23, 2014
Auszug aus dem Dokument

Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

Verpackung

Pin666
Package TypeYZPYZPYZP
Industry STD TermDSBGADSBGADSBGA
JEDEC CodeR-XBGA-NR-XBGA-NR-XBGA-N
Package QTY300030003000
CarrierLARGE T&RLARGE T&RLARGE T&R
Device MarkingTCNTC2TC7
Width (mm).9.9.9
Length (mm)1.51.51.5
Thickness (mm)222
Pitch (mm).5.5.5
Max Height (mm).5.5.5
Mechanical DataHerunterladenHerunterladenHerunterladen

Parameter

3-State OutputYes
Bits1
F @ Nom Voltage(Max)100 Mhz
Gate TypeTRANSCEIVER
ICC @ Nom Voltage(Max)0.0009 mA
LogicTrue
Operating Temperature Range-40 to 85 C
Output Drive (IOL/IOH)(Max)4/-4 mA
Package GroupDSBGA
Package Size: mm2:W x LSee datasheet (DSBGA) PKG
RatingCatalog
Schmitt TriggerNo
Special FeaturesIOFF,Dual Supply,Translation
Sub-FamilyDual Supply Translator
Technology FamilyAVC
VCC(Max)3.6 V
VCC(Min)1.2 V
Voltage(Nom)1.2,1.5,1.8,2.5,3.3 V
tpd @ Nom Voltage(Max)2.9,5.6,5.2,4.2,3.8 ns

Öko-Plan

RoHSCompliant

Design Kits und Evaluierungsmodule

  • Evaluation Modules & Boards: CDCI6214EVM
    CDCI6214 Ultra-Low Power Clock Generator Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: DLPLCR6500EVM
    DLPВ® LightCrafterВ™ 6500 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: DLPLCR9000EVM
    DLPВ® LightCrafterВ™ 9000 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: AVCLVCDIRCNTRL-EVM
    Generic EVM for Direction-Controlled Bidirectional Translation Device Supporting AVC and LVC
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: DLPLCR4500EVM
    DLPВ® LightCrafterВ™ 4500
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: EVMX777BG-01-00-00
    J6Entry, RSP and TDA2E-17 CPU Board Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: EVMK2G
    66AK2Gx (K2G) Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: EVMX777G-01-20-00
    J6Entry/RSP Infotainment (CPU+Display+JAMR3) Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

Anwendungshinweise

  • Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)
    PDF, 126 Kb, Revision: B, Datei veröffentlicht: Jul 7, 1999
    Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i
  • AVC Logic Family Technology and Applications (Rev. A)
    PDF, 148 Kb, Revision: A, Datei veröffentlicht: Aug 26, 1998
    Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control (
  • Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)
    PDF, 390 Kb, Revision: B, Datei veröffentlicht: Apr 30, 2015
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, Revision: B, Datei veröffentlicht: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa

Modellreihe

Herstellerklassifikation

  • Semiconductors > Logic > Little Logic