Datasheet Texas Instruments ADS7852Y/2KG4 — Datenblatt

HerstellerTexas Instruments
SerieADS7852
ArtikelnummerADS7852Y/2KG4
Datasheet Texas Instruments ADS7852Y/2KG4

12-Bit-Analog-Digital-Wandler mit 8 Kanälen und parallelem Ausgang 32-TQFP

Datenblätter

ADS7852: 12-Bit, 8-Channel, Parallel Output Analog-to-Digital Converter datasheet
PDF, 370 Kb, Revision: C, Datei veröffentlicht: Jul 22, 2004
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Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin32
Package TypePBS
Industry STD TermTQFP
JEDEC CodeS-PQFP-G
Width (mm)5
Length (mm)5
Thickness (mm)1
Pitch (mm).5
Max Height (mm)1.2
Mechanical DataHerunterladen

Parameter

# Input Channels8
Analog Voltage AVDD(Max)(V)5.25
Analog Voltage AVDD(Min)(V)4.75
Approx. Price (US$)3.57 | 1ku
ArchitectureSAR
Digital Supply(Max)(V)5.25
Digital Supply(Min)(V)4.75
INL(Max)(+/-LSB)1
Input Range(Max)(V)5
Input TypeSingle-Ended
Integrated FeaturesN/A
InterfaceParallel
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range(C)-40 to 85
Package GroupTQFP
Package Size: mm2:W x L (PKG)32TQFP: 49 mm2: 7 x 7(TQFP)
Power Consumption(Typ)(mW)13
RatingCatalog
Reference ModeExt
Int
Resolution(Bits)12
SINAD(dB)N/A
SNR(dB)72
Sample Rate (max)(SPS)500kSPS
THD(Typ)(dB)-77

Öko-Plan

RoHSNot Compliant
Pb FreeNo

Anwendungshinweise

  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Modellreihe

Herstellerklassifikation

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)