Datasheet Texas Instruments SN74LS593N3 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SN74LS593 |
| Artikelnummer | SN74LS593N3 |
8-Bit-Binärzähler mit Eingangsregistern und 3-Zustands-Ausgängen 20-PDIP 0 bis 70
Datenblätter
8-Bit Binary Counters With Input Registers datasheet
PDF, 1.4 Mb, Datei veröffentlicht: Mar 1, 1988
Auszug aus dem Dokument
Preise
Status
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 20 |
| Package Type | N |
| Industry STD Term | PDIP |
| JEDEC Code | R-PDIP-T |
| Width (mm) | 6.35 |
| Length (mm) | 24.33 |
| Thickness (mm) | 4.57 |
| Pitch (mm) | 2.54 |
| Max Height (mm) | 5.08 |
| Mechanical Data | Herunterladen |
Parameter
| Approx. Price (US$) | 6.47 | 1ku |
| Bits(#) | 8 |
| F @ Nom Voltage(Max)(Mhz) | 35 |
| Function | Counter |
| ICC @ Nom Voltage(Max)(mA) | 85 |
| Input Type | TTL |
| Operating Temperature Range(C) | 0 to 70 |
| Output Drive (IOL/IOH)(Max)(mA) | 24/-2.6 |
| Output Type | CMOS |
| Package Group | PDIP |
| Package Size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | LS |
| Type | Binary |
| VCC(Max)(V) | 5.25 |
| VCC(Min)(V) | 4.75 |
| Voltage(Nom)(V) | 5 |
| tpd @ Nom Voltage(Max)(ns) | 63 |
Öko-Plan
| RoHS | Not Compliant |
| Pb Free | No |
Anwendungshinweise
- Designing with the SN54/74LS123 (Rev. A)PDF, 118 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1997
The Texas Instruments (TI) SN54/74LS123 dual retriggerable monostable multivibrator is a one-shot device capable of verylong output pulses and up to 100% duty cycle. The ?LS123 also features dc triggering from gated low-level active A andhigh-level active B inputs and provides a clear input that terminates the output pulse of any predetermined time independentof timing components R ext and
Modellreihe
Serie: SN74LS593 (4)
- SN74LS593DW SN74LS593DWR SN74LS593N SN74LS593N3
Herstellerklassifikation
- Semiconductors > Logic > Specialty Logic > Counter/Arithmetic/Parity Function