Datasheet Texas Instruments TLV2542IDGKG4 — Datenblatt

12-Bit-ADC mit 200 kSPS, serieller Ausgang, TMS320-kompatibel (bis zu 10 MHz), Dual Ch.

Datenblätter

PDF, 1.2 Mb, Revision: E, Datei veröffentlicht: Apr 12, 2010

Auszug aus dem Dokument

Auto Sweep 8-VSSOP -40 bis 85

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	Yes

# Input Channels	2
Analog Voltage AVDD(Max)	5.5 V
Analog Voltage AVDD(Min)	2.7 V
Architecture	SAR
Digital Supply(Max)	5.5 V
Digital Supply(Min)	2.7 V
INL(Max)	1 +/-LSB
Input Range(Max)	5.5 V
Input Type	Single-Ended
Integrated Features	Oscillator
Interface	SPI
Multi-Channel Configuration	Multiplexed
Operating Temperature Range	-40 to 85,0 to 70 C
Package Group	VSSOP
Package Size: mm2:W x L	8VSSOP: 15 mm2: 4.9 x 3(VSSOP) PKG
Power Consumption(Typ)	2.8 mW
Rating	Catalog
Reference Mode	Ext
Resolution	12 Bits
SINAD	72 dB
SNR	72 dB
Sample Rate (max)	200kSPS SPS
Sample Rate(Max)	0.2 MSPS
THD(Typ)	-84 dB

RoHS

Compliant

Evaluation Modules & Boards: 5-6KINTERFACE
5-6K Interface Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
- Herunterladen

Herunterladen
Interfacing the TLC2552 and TLV2542 to the MSP430F149
PDF, 123 Kb, Datei veröffentlicht: Feb 10, 2003
This application note discusses the features of the TLC2552 and TLV2542 ADC. An SPI interface code example for the MSP430F149 to the TLC2552 ADC, and for the MSP430F149 to the TLV2542 ADC, are also presented.
Herunterladen
Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
Herunterladen
Determining Minimum Acquisition Times for SAR ADCs, part 2
PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Serie: TLV2542 (9)

Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)