Datasheet Texas Instruments ADS7948SRTER — Datenblatt

HerstellerTexas Instruments
SerieADS7948
ArtikelnummerADS7948SRTER
Datasheet Texas Instruments ADS7948SRTER

10-Bit, 2 MSPS, zweikanaliger, pseudodifferenzieller serieller uPower-SAR-ADC 16-WQFN -40 bis 125

Datenblätter

12/10/8-Bit, 2MSPS, Dual-Ch, Unipolar, Pseudo-Diff, Ultralow-Power SAR ADCs datasheet
PDF, 874 Kb, Datei veröffentlicht: Sep 9, 2010
Auszug aus dem Dokument

Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

Verpackung

Pin16
Package TypeRTE
Industry STD TermWQFN
JEDEC CodeS-PQFP-N
Package QTY3000
CarrierLARGE T&R
Device Marking7948
Width (mm)3
Length (mm)3
Thickness (mm).75
Pitch (mm).5
Max Height (mm).8
Mechanical DataHerunterladen

Parameter

# Input Channels2
Analog Voltage AVDD(Max)5.5 V
Analog Voltage AVDD(Min)2.7 V
ArchitectureSAR
Digital Supply(Max)5.5 V
Digital Supply(Min)1.65 V
INL(Max)0.5 +/-LSB
Input Range(Max)5.5 V
Input TypePseudo-Differential,Single-Ended
Integrated FeaturesN/A
InterfaceSPI
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range-40 to 125 C
Package GroupWQFN
Package Size: mm2:W x L16WQFN: 9 mm2: 3 x 3(WQFN) PKG
Power Consumption(Typ)7.5 mW
RatingCatalog
Reference ModeExt
Resolution10 Bits
SINAD61 dB
SNR61 dB
Sample Rate (max)2MSPS SPS
Sample Rate(Max)2 MSPS
THD(Typ)-80 dB

Öko-Plan

RoHSCompliant

Anwendungshinweise

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015

Modellreihe

Serie: ADS7948 (2)

Herstellerklassifikation

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)