Datasheet Texas Instruments CD4020BPWR — Datenblatt
Hersteller | Texas Instruments |
Serie | CD4020B |
Artikelnummer | CD4020BPWR |
CMOS 14-stufiger Ripple-Carry-Binärzähler / Teiler 16-TSSOP -55 bis 125
Datenblätter
Datasheet CD4020B, CD4024B, CD4040B
PDF, 1.6 Mb, Revision: D, Datei veröffentlicht: Dec 11, 2003, Seiten: 25
CMOS Ripple-Carry Binary Counter/Dividers
CMOS Ripple-Carry Binary Counter/Dividers
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Preise
Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Verpackung
Pin | 16 |
Package Type | PW |
Industry STD Term | TSSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 2000 |
Carrier | LARGE T&R |
Device Marking | CM020B |
Width (mm) | 4.4 |
Length (mm) | 5 |
Thickness (mm) | 1 |
Pitch (mm) | 0.65 |
Max Height (mm) | 1.2 |
Mechanical Data | Herunterladen |
Parameter
Approx. price | 0.11 | 1ku US$ |
Bits | 12 |
F @ nom voltage(Max) | 8 MHz |
Function | Counter |
ICC @ nom voltage(Max) | 0.03 mA |
IOH(Max) | -1.5 mA |
IOL(Max) | 1.5 mA |
Operating temperature range | -55 to 125 C |
Package Group | PDIP|16,SO|16,TSSOP|16 |
Package size: mm2:W x L | See datasheet (PDIP),16SO: 80 mm2: 7.8 x 10.2 (SO|16),16TSSOP: 22 mm2: 4.4 x 5 (TSSOP|16) PKG |
Rating | Catalog |
Technology Family | CD4000 |
Type | Binary |
VCC(Max) | 18 V |
VCC(Min) | 3 V |
Voltage(Nom) | 5,10,15 V |
tpd @ nom Voltage(Max) | 160 ns |
Öko-Plan
RoHS | Compliant |
Pb Free | Yes |
Anwendungshinweise
- Understanding Buffered and Unbuffered CD4xxxB Series Device CharacteristicsPDF, 188 Kb, Datei veröffentlicht: Dec 3, 2001
Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb - Semiconductor Packing Material Electrostatic Discharge (ESD) ProtectionPDF, 337 Kb, Datei veröffentlicht: Jul 8, 2004
Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge - Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)PDF, 614 Kb, Revision: C, Datei veröffentlicht: Dec 2, 2015
Modellreihe
Serie: CD4020B (8)
Herstellerklassifikation
- Semiconductors > Logic > Specialty logic > Counter/arithmetic/parity function