Datasheet Texas Instruments V62/10603-01XE — Datenblatt
Hersteller | Texas Instruments |
Serie | TLV2548-EP |
Artikelnummer | V62/10603-01XE |
Erweitertes Produkt 2-Bit 200 kSPS ADC Ser.
Datenblätter
2.7-V to 5.5-V 12-Bit 200 KSPS 4-/8-Channel Low-Power Serial Converter datasheet
PDF, 1.3 Mb, Datei veröffentlicht: Oct 28, 2009
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Detaillierte Beschreibung
Out, Auto Pwrdn (S / W und H / W), Low Power W / 8 x FIFO W / 8 Ch 20-TSSOP -55 bis 125
Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes |
Verpackung
Pin | 20 |
Package Type | PW |
Industry STD Term | TSSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 2000 |
Carrier | LARGE T&R |
Device Marking | TV2548EP |
Width (mm) | 4.4 |
Length (mm) | 6.5 |
Thickness (mm) | 1 |
Pitch (mm) | .65 |
Max Height (mm) | 1.2 |
Mechanical Data | Herunterladen |
Parameter
# Input Channels | 8 |
Analog Voltage AVDD(Max) | 5.5 V |
Analog Voltage AVDD(Min) | 3 V |
Architecture | SAR |
Digital Supply(Max) | 5.5 V |
Digital Supply(Min) | 3 V |
ENOB | 11.6 Bits |
INL(Max) | 1.2 +/-LSB |
Interface | SPI |
Operating Temperature Range | -55 to 125 C |
Package Group | TSSOP |
Package Size: mm2:W x L | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) PKG |
Power Consumption(Typ) | 3.3 mW |
Rating | HiRel Enhanced Product |
Reference Mode | Ext,Int |
Resolution | 12 Bits |
SFDR | 84 dB |
SNR | 70 dB |
Sample Rate (max) | 200kSPS SPS |
Öko-Plan
RoHS | Compliant |
Anwendungshinweise
- Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Modellreihe
Serie: TLV2548-EP (2)
- TLV2548MPWREP V62/10603-01XE
Herstellerklassifikation
- Semiconductors > Space & High Reliability > Data Converter > Analog to Digital Converters
Andere Namen:
V62/1060301XE, V62/10603 01XE