Datasheet Texas Instruments CD74AC74M — Datenblatt

HerstellerTexas Instruments
SerieCD74AC74
ArtikelnummerCD74AC74M
Datasheet Texas Instruments CD74AC74M

Dual Positive-Edge-Triggered D-Type Flip-Flops mit Set und Reset 14-SOIC -55 bis 125

Datenblätter

CD54AC74, CD74AC74 datasheet
PDF, 786 Kb, Revision: D, Datei veröffentlicht: Dec 5, 2002
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Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin14
Package TypeD
Industry STD TermSOIC
JEDEC CodeR-PDSO-G
Package QTY50
CarrierTUBE
Device MarkingAC74M
Width (mm)3.91
Length (mm)8.65
Thickness (mm)1.58
Pitch (mm)1.27
Max Height (mm)1.75
Mechanical DataHerunterladen

Parameter

3-State OutputNo
Bits2
F @ Nom Voltage(Max)100 Mhz
ICC @ Nom Voltage(Max)0.04 mA
Operating Temperature Range-55 to 125 C
Output Drive (IOL/IOH)(Max)24/-24 mA
Package GroupSOIC
Package Size: mm2:W x L14SOIC: 52 mm2: 6 x 8.65(SOIC) PKG
RatingCatalog
Schmitt TriggerNo
Technology FamilyAC
VCC(Max)5.5 V
VCC(Min)1.5 V
Voltage(Nom)1.5,3.3,5 V
tpd @ Nom Voltage(Max)114,12.7,9.1 ns

Öko-Plan

RoHSCompliant

Anwendungshinweise

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revision: A, Datei veröffentlicht: Feb 6, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, Datei veröffentlicht: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Modellreihe

Herstellerklassifikation

  • Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Flip-Flop