Datasheet Texas Instruments CDCM7005ZVAR — Datenblatt
| Hersteller | Texas Instruments |
| Serie | CDCM7005 |
| Artikelnummer | CDCM7005ZVAR |
Hochleistungs-Synchronisierer mit geringem Phasenrauschen und geringem Schräglauf, der den Ref-Takt mit VCXO 64-BGA -40 bis 85 synchronisiert
Datenblätter
CDCM7005 3.3-V High Performance Clock Synchronizer and Jitter Cleaner datasheet
PDF, 4.0 Mb, Revision: G, Datei veröffentlicht: Aug 16, 2017
Auszug aus dem Dokument
Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 64 |
| Package Type | ZVA |
| Industry STD Term | BGA |
| JEDEC Code | S-PBGA-N |
| Package QTY | 1000 |
| Carrier | LARGE T&R |
| Device Marking | CDCM7005 |
| Width (mm) | 8 |
| Length (mm) | 8 |
| Thickness (mm) | .96 |
| Pitch (mm) | .8 |
| Max Height (mm) | 1.4 |
| Mechanical Data | Herunterladen |
Parameter
| Divider Ratio | 1 to 16 |
| Input Level | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) |
| Number of Inputs | 2 |
| Number of Outputs | 5 |
| Operating Temperature Range | -40 to 85 C |
| Output Frequency(Max) | 1500 MHz |
| Output Level | LVCMOS,LVPECL |
| Package Group | BGA |
| Package Size: mm2:W x L | 64BGA: 64 mm2: 8 x 8(BGA) PKG |
| Rating | Catalog |
| Special Features | Programmable Delay |
| Supply Voltage(Max) | 3.6 V |
| Supply Voltage(Min) | 3 V |
Öko-Plan
| RoHS | Compliant |
| Pb Free | Yes |
Design Kits und Evaluierungsmodule
- Evaluation Modules & Boards: CDCE72010EVM
CDCE72010EVM Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: DAC5682ZEVM
DAC5682Z Dual-Channel, 16-Bit, 1.0-GSPS Digital-to-Analog Converter Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: ADS5483EVM
ADS5483 16-Bit, 135-MSPS Analog-to-Digital Converter Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: CDCL6010EVM
CDCL6010EVM Evaluation Module
Lifecycle Status: Preview (Device has been announced but is not in production. Samples may or may not be available) - Evaluation Modules & Boards: TSW3100EVM
TSW3100 Pattern Generator Module
Lifecycle Status: Obsolete (Manufacturer has discontinued the production of the device) - Evaluation Modules & Boards: CDCM7005BGA-EVM
CDCM7005 BGA Package Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: CDC7005QFN-EVM
CDC7005 QFN Package Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: CDCM7005QFN-EVM
CDCM7005 QFN Package Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: ADS5474EVM
ADS5474 14-Bit, 400-MSPS Analog-to-Digital Converter Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: DAC5688EVM
DAC5688 Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Anwendungshinweise
- TLK313x/CDCM7005 Multi-hop PerformancePDF, 2.4 Mb, Datei veröffentlicht: Nov 1, 2009
- Phase Noise/Phase Jitter Performance of CDCM7005PDF, 1.1 Mb, Datei veröffentlicht: Jul 26, 2005
Modellreihe
Serie: CDCM7005 (7)
Herstellerklassifikation
- Semiconductors > Clock and Timing > Clock Jitter Cleaners > Single-Loop PLL