Datasheet Texas Instruments SN74S51N3 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SN74S51 |
| Artikelnummer | SN74S51N3 |
Dual 2-breite 2-Eingänge UND-ODER-Invertierungsgatter 14-PDIP 0 bis 70
Datenblätter
AND-OR-Invert Gates datasheet
PDF, 1.1 Mb, Datei veröffentlicht: Mar 1, 1988
Auszug aus dem Dokument
Preise
Status
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 14 |
| Package Type | N |
| Industry STD Term | PDIP |
| JEDEC Code | R-PDIP-T |
| Width (mm) | 6.35 |
| Length (mm) | 19.3 |
| Thickness (mm) | 3.9 |
| Pitch (mm) | 2.54 |
| Max Height (mm) | 5.08 |
| Mechanical Data | Herunterladen |
Parameter
| Approx. Price (US$) | 0.57 | 1ku |
| Bits(#) | 2 |
| F @ Nom Voltage(Max)(Mhz) | 50 |
| ICC @ Nom Voltage(Max)(mA) | 0.008 |
| Input Type | TTL |
| Operating Temperature Range(C) | 0 to 70 |
| Output Drive (IOL/IOH)(Max)(mA) | 0.4/-16 |
| Output Type | TTL |
| Package Group | PDIP |
| Package Size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | S |
| VCC(Max)(V) | 5.25 |
| VCC(Min)(V) | 4.75 |
| Voltage(Nom)(V) | 5 |
| tpd @ Nom Voltage(Max)(ns) | 22 |
Öko-Plan
| RoHS | Not Compliant |
| Pb Free | No |
Modellreihe
Serie: SN74S51 (5)
- SN74S51D SN74S51J SN74S51N SN74S51N3 SN74S51NE4
Herstellerklassifikation
- Semiconductors > Logic > Gate > Combination Gate