DP8570A DP8570A Timer Clock Peripheral (TCP) Literature Number: SNAS557 DP8570A Timer Clock Peripheral (TCP)
General Description
The DP8570A is intended for use in microprocessor based
systems where information is required for multi-tasking, data
logging or general time of day/date information. This device
is implemented in low voltage silicon gate microCMOS technology to provide low standby power in battery back-up environments. The circuit’s architecture is such that it looks
like a contiguous block of memory or I/O ports. The address
space is organized as 2 software selectable pages of 32
bytes. This includes the Control Registers, the Clock Counters, the Alarm Compare RAM, the Timers and their data
RAM, and the Time Save RAM. Any of the RAM locations
that are not being used for their intended purpose may be
used as general purpose CMOS RAM.
Time and date are maintained from 1/100 of a second to
year and leap year in a BCD format, 12 or 24 hour modes.
Day of week, day of month and day of year counters are
provided. Time is controlled by an on-chip crystal oscillator
requiring only the addition of the crystal and two capacitors.
The choice of crystal frequency is program selectable.
Two independent multifunction 10 MHz 16-bit timers are
provided. These timers operate in four modes. Each has its
own prescaler and can select any of 8 possible clock inputs.
Thus, by programming the input clocks and the timer counter values a very wide range of timing durations can be
achieved. The range is from about 400 ns (4.915 MHz oscillator) to 65,535 seconds (18 hrs., 12 min.). …
