Datasheet Texas Instruments ADS61JB23IRHAT — Datenblatt
Hersteller | Texas Instruments |
Serie | ADS61JB23 |
Artikelnummer | ADS61JB23IRHAT |
12-Bit-80-MSPS-Analog-Digital-Wandler (ADC) 40-VQFN -40 bis 85
Datenblätter
12-Bit Input-Buffered 80 MSPS ADC with JESD204A Output Interface datasheet
PDF, 1.3 Mb, Datei veröffentlicht: Dec 1, 2012
Auszug aus dem Dokument
Preise
Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes |
Verpackung
Pin | 40 |
Package Type | RHA |
Industry STD Term | VQFN |
JEDEC Code | S-PQFP-N |
Package QTY | 250 |
Carrier | SMALL T&R |
Device Marking | 61JB23 |
Width (mm) | 6 |
Length (mm) | 6 |
Thickness (mm) | .9 |
Pitch (mm) | .5 |
Max Height (mm) | 1 |
Mechanical Data | Herunterladen |
Parameter
# Input Channels | 1 |
Analog Input BW | 480 MHz |
Architecture | Pipeline |
DNL(Max) | 0.8 +/-LSB |
DNL(Typ) | 0.3 +/-LSB |
ENOB | 11.5 Bits |
INL(Max) | 1.5 +/-LSB |
INL(Typ) | 0.7 +/-LSB |
Input Buffer | Yes |
Input Range | 2 Vp-p |
Interface | JESD204A |
Operating Temperature Range | -40 to 85 C |
Package Group | VQFN |
Package Size: mm2:W x L | 40VQFN: 36 mm2: 6 x 6(VQFN) PKG |
Power Consumption(Typ) | 440 mW |
Rating | Catalog |
Reference Mode | Ext,Int |
Resolution | 12 Bits |
SFDR | 80 dB |
SINAD | 71.2 dB |
SNR | 71.7 dB |
Sample Rate(Max) | 80 MSPS |
Öko-Plan
RoHS | Compliant |
Anwendungshinweise
- Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)PDF, 1.2 Mb, Revision: A, Datei veröffentlicht: Jul 19, 2013
- Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)PDF, 2.0 Mb, Revision: A, Datei veröffentlicht: May 22, 2015
- Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015
Modellreihe
Serie: ADS61JB23 (2)
- ADS61JB23IRHAR ADS61JB23IRHAT
Herstellerklassifikation
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)