Datasheet Texas Instruments 66AK2L06XCMSA2 — Datenblatt

Hersteller	Texas Instruments
Serie	66AK2L06
Artikelnummer	66AK2L06XCMSA2

Datenblätter

Preise

Status

Verpackung

Parameter

Öko-Plan

Design Kits und Evaluierungsmodule

• Evaluation Modules & Boards: XEVMK2LX
  66AK2L06 Evaluation Module
  Lifecycle Status: Active (Recommended for new designs)
  
• JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
  XDS560v2 System Trace USB Debug Probe
  Lifecycle Status: Active (Recommended for new designs)
  
• JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
  XDS560v2 System Trace USB & Ethernet Debug Probe
  Lifecycle Status: Active (Recommended for new designs)
  
• JTAG Emulators/ Analyzers: TMDSEMU200-U
  XDS200 USB Debug Probe
  Lifecycle Status: Active (Recommended for new designs)
  

Anwendungshinweise

• Herunterladen
  TPS544Bxx/TPS544Cxx Powering TCI6630K2L in Smart Reflex Class 0 TC Mode
  PDF, 154 Kb, Datei veröffentlicht: Sep 18, 2015
  This application report describes an application circuit example of the TPS544B/Cxx family of power management IC (PMIC) powering the Smart-Reflex digital core supply of the TCI6630K2L SoC. Smart-Reflex Class 0 Temperature Compensation (Class 0 TC) mode of operation of the TCI6630K2L device is emphasized. Assumption is that temperature compensation mode is enabled using the function provided in th
• Herunterladen
  66AK2L06 JESD Attach to ADC12J4000/DAC38J84 Getting Started Guide (Rev. B)
  PDF, 8.8 Mb, Revision: B, Datei veröffentlicht: Jun 20, 2016
• Herunterladen
  Keystone EDMA FAQ
  PDF, 1.3 Mb, Datei veröffentlicht: Sep 1, 2016
  This document is a collection of frequently asked questions (FAQs) on enhanced direct memory access (EDMA) on KeyStoneв„ў I (KS1) and KeyStone II (KS2) devices, along with useful collateral and software reference links.
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  System solution for avionics & defense
  PDF, 1.2 Mb, Datei veröffentlicht: Sep 23, 2015
• Herunterladen
  Keystone II DDR3 Initialization
  PDF, 73 Kb, Datei veröffentlicht: Jan 26, 2015
  This application report provides a step-to-step initialization guide for the Keystone II device DDR3 SDRAM controller.
• Herunterladen
  Power Management of KS2 Device (Rev. C)
  PDF, 61 Kb, Revision: C, Datei veröffentlicht: Jul 15, 2016
  This application report lists the steps to enable Class 0 Temperature Compensation (Class 0 TC) mode of SmartReflexв„ў Subsystem (SRSS) module available on such devices.
• Herunterladen
  Throughput Performance Guide for KeyStone II Devices (Rev. B)
  PDF, 866 Kb, Revision: B, Datei veröffentlicht: Dec 22, 2015
  This application report analyzes various performance measurements of the KeyStone II family of processors. It provides a throughput analysis of the various support peripherals to different end-points and memory access.
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  Keystone II DDR3 Debug Guide
  PDF, 143 Kb, Datei veröffentlicht: Oct 16, 2015
  This guide provides tools for use when debugging a failing DDR3 interface on a KeyStone II device.
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  Hardware Design Guide for KeyStone II Devices
  PDF, 1.8 Mb, Datei veröffentlicht: Mar 24, 2014
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  SERDES Link Commissioning on KeyStone I and II Devices
  PDF, 138 Kb, Datei veröffentlicht: Apr 13, 2016
  The serializer-deserializer (SerDes) performs serial-to-parallel conversions on data received from a peripheral device and parallel-to-serial conversion on data received from the CPU. This application report explains the SerDes transmit and receive parameters tuning, tools and some debug techniques for TI Keystone I and Keystone II devices.
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  PCIe Use Cases for KeyStone Devices
  PDF, 320 Kb, Datei veröffentlicht: Dec 13, 2011
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  Optimizing Loops on the C66x DSP
  PDF, 585 Kb, Datei veröffentlicht: Nov 9, 2010
• Herunterladen
  The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)
  PDF, 20 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
  The C6000 compiler tools support a new ELF-based ABI named EABI. Prior to this time, the compiler only supported a single ABI, which is now named COFF ABI. The following compelling best-in-class features are available under the C6000 EABI:GeneralZero-init globals: “int gvar;” gets set to 0 before main runs.Dynamic linking: Add code to a running system.Native ROM
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  Clocking Design Guide for KeyStone Devices
  PDF, 1.5 Mb, Datei veröffentlicht: Nov 9, 2010
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  DDR3 Design Requirements for KeyStone Devices (Rev. B)
  PDF, 582 Kb, Revision: B, Datei veröffentlicht: Jun 5, 2014
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  Multicore Programming Guide (Rev. B)
  PDF, 1.8 Mb, Revision: B, Datei veröffentlicht: Aug 29, 2012
  As application complexity continues to grow, we have reached a limit on increasing performance by merely scaling clock speed. To meet the ever-increasing processing demand, modern System-On-Chip solutions contain multiple processing cores. The dilemma is how to map applications to multicore devices. In this paper, we present a programming methodology for converting applications to run on multicore
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  TI DSP Benchmarking
  PDF, 62 Kb, Datei veröffentlicht: Jan 13, 2016
  This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms.

Modellreihe

Herstellerklassifikation

• Semiconductors > Processors > Digital Signal Processors > C6000 DSP + ARM Processors > 66AK2x