Datasheet Texas Instruments TLC2543CDBLE — Datenblatt
| Hersteller | Texas Instruments |
| Serie | TLC2543 |
| Artikelnummer | TLC2543CDBLE |
12-Bit 66 kSPS ADC Ser. Out, Pgrmable MSB / LSB Zuerst Pgrmable Power Down / Ausgangsdatenlänge, 11 Ch. 20-SSOP
Datenblätter
12-Bit Analog-to-Digital Converters With Serial Control and 11 Analog Inputs datasheet
PDF, 1.7 Mb, Revision: F, Datei veröffentlicht: Nov 27, 2001
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Preise
Status
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 20 |
| Package Type | DB |
| Industry STD Term | SSOP |
| JEDEC Code | R-PDSO-G |
| Width (mm) | 5.3 |
| Length (mm) | 7.2 |
| Thickness (mm) | 1.95 |
| Pitch (mm) | .65 |
| Max Height (mm) | 2 |
| Mechanical Data | Herunterladen |
Parameter
| # Input Channels | 11 |
| Analog Voltage AVDD(Max)(V) | 5.5 |
| Analog Voltage AVDD(Min)(V) | 4.5 |
| Approx. Price (US$) | 5.23 | 1ku |
| Architecture | SAR |
| Digital Supply(Max)(V) | 5.5 |
| Digital Supply(Min)(V) | 4.5 |
| INL(Max)(+/-LSB) | 1 |
| Input Range(Max)(V) | 5.5 |
| Input Type | Single-Ended |
| Integrated Features | N/A |
| Interface | Serial SPI |
| Multi-Channel Configuration | Multiplexed |
| Operating Temperature Range(C) | -40 to 85 |
| Package Group | SSOP |
| Package Size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Power Consumption(Typ)(mW) | 5 |
| Rating | Catalog |
| Reference Mode | Ext |
| Resolution(Bits) | 12 |
| Sample Rate (max)(SPS) | 66kSPS |
Öko-Plan
| RoHS | Not Compliant |
| Pb Free | No |
Anwendungshinweise
- Microcontroller Based Data Acquisition Using the TLC2543 12-Bit Serial Out ADCPDF, 127 Kb, Datei veröffentlicht: Jul 1, 1995
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This document details an interface between a TMS320C25 digital signal processor (DSP) and the TLC2543 12-bit, 11-channel analog-to-digital converter (ADC). A description of the TLC2543, hardware interfacing, and a software description are provided. Benchmark information for sample rates, data timing, and control timing are provided. Briefly discussed are the benefits in compensators or feedback sy - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Modellreihe
Serie: TLC2543 (23)
Herstellerklassifikation
- Semiconductors > Data Converters > Analog to Digital Converter > Precision ADC (<=10MSPS)