Datasheet Texas Instruments 5962-9052605QXC — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SMJ320C30 |
| Artikelnummer | 5962-9052605QXC |
Digitaler Signalprozessor 181-CPGA -55 bis 125
Datenblätter
SMJ320C30 Digital Signal Processors datasheet
PDF, 765 Kb, Revision: H, Datei veröffentlicht: Jun 2, 2004
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Preise
Status
| Lifecycle Status | Lifebuy (Manufacturer has announced that the device will be discontinued, and a lifetime-buy period is in effect) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 181 | 181 | 181 |
| Package Type | GB | GB | GB |
| Industry STD Term | CPGA | CPGA | CPGA |
| JEDEC Code | S-CPGA-P | S-CPGA-P | S-CPGA-P |
| Package QTY | 1 | 1 | 1 |
| Carrier | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) |
| Device Marking | SMJ320C30GBM50 | 5962-9052605QX | C |
| Width (mm) | 40.4 | 40.4 | 40.4 |
| Length (mm) | 40.4 | 40.4 | 40.4 |
| Thickness (mm) | 3.43 | 3.43 | 3.43 |
| Pitch (mm) | 2.54 | 2.54 | 2.54 |
| Max Height (mm) | 4.7 | 4.7 | 4.7 |
| Mechanical Data | Herunterladen | Herunterladen | Herunterladen |
Öko-Plan
| RoHS | See ti.com |
Anwendungshinweise
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FIFO memories are used in digital signal processing systems for matching data paths with asynchronous clock or data rates. This document shows the SN74ACT3632 512?36?2 clocked FIFO as a single-chip bi-directional buffering solution that interfaces to the TI TMS320C3x and TMS320C4x floating-point DSP family. Programmable FIFO flags enable DMA control techniques that are used to handle the data flow - Engine Knock Detection Using Spectral Analysis With TMS320C25 or TMS320C30 DSPsPDF, 254 Kb, Datei veröffentlicht: Jan 1, 1995
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The low-cost of the TMS320C32 (?C32) makes 32-bit floating-point digital signal processing (DSP) available to a wider variety of applications than ever before. This document explains in detail the features of the ?C32 enhanced memory interface with design examples for 32- 16- and 8-bit-wide external memories. Comprehensive diagrams show precise operation of the processor and complete circuits fo - Setting Up TMS320 DSP Interrupts in 'C'PDF, 168 Kb, Datei veröffentlicht: Nov 1, 1994
Four steps are required to set the TMS320 DSP interrupts: create a interrupt service routine initialize the vector table and set the memory map enable the interrupts in the CPU and enable the interrupt sources. This document shows how to set the interrupts in C C callable assembly or in-line C. Sample C code segments are provided. The appendix gives complete examples for setting interrupt vec
Modellreihe
Serie: SMJ320C30 (11)
Herstellerklassifikation
- Semiconductors > Processors > Digital Signal Processors > Other High Reliability DSPs
Andere Namen:
59629052605QXC, 5962 9052605QXC